[Commit-gnuradio] r6496 - gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx

[matt]

Author: matt
Date: 2007-09-20 17:54:50 -0600 (Thu, 20 Sep 2007)
New Revision: 6496

Modified:
   gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
Log:
use correct `define, from Claus


Modified: 
gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v    
2007-09-20 23:52:27 UTC (rev 6495)
+++ gnuradio/branches/developers/matt/u2f/eth/rtl/verilog/MAC_tx/MAC_tx_FF.v    
2007-09-20 23:54:50 UTC (rev 6496)
@@ -143,25 +143,25 @@
 
 reg [3:0]       Next_state_SYS;
 
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_wr          ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_wr_ungray   ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_wr_gray     ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_wr_gray_dl1 ;
-wire[`MAC_RX_FF_DEPTH-1:0]       Add_wr_gray_tmp ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_wr          ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_wr_ungray   ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_wr_gray     ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_wr_gray_dl1 ;
+wire[`MAC_TX_FF_DEPTH-1:0]       Add_wr_gray_tmp ;
 
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd          ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd_reg      ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd_gray     ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd_gray_dl1 ;
-wire[`MAC_RX_FF_DEPTH-1:0]       Add_rd_gray_tmp ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd_ungray   ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd          ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd_reg      ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd_gray     ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd_gray_dl1 ;
+wire[`MAC_TX_FF_DEPTH-1:0]       Add_rd_gray_tmp ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd_ungray   ;
 wire[35:0]      Din             ;
 wire[35:0]      Dout            ;
 reg             Wr_en           ;
-wire[`MAC_RX_FF_DEPTH-1:0]       Add_wr_pluse    ;
-wire[`MAC_RX_FF_DEPTH-1:0]       Add_wr_pluse_pluse;
-wire[`MAC_RX_FF_DEPTH-1:0]       Add_rd_pluse    ;
-reg [`MAC_RX_FF_DEPTH-1:0]       Add_rd_reg_dl1  ;
+wire[`MAC_TX_FF_DEPTH-1:0]       Add_wr_pluse    ;
+wire[`MAC_TX_FF_DEPTH-1:0]       Add_wr_pluse_pluse;
+wire[`MAC_TX_FF_DEPTH-1:0]       Add_rd_pluse    ;
+reg [`MAC_TX_FF_DEPTH-1:0]       Add_rd_reg_dl1  ;
 
 `ifdef MAC_TARGET_ALTERA
 
@@ -335,8 +335,8 @@
         Add_wr_gray         <=0;
     else 
                begin
-               Add_wr_gray[`MAC_RX_FF_DEPTH-1] <=Add_wr[`MAC_RX_FF_DEPTH-1];
-               for (i=`MAC_RX_FF_DEPTH-2;i>=0;i=i-1)
+               Add_wr_gray[`MAC_TX_FF_DEPTH-1] <=Add_wr[`MAC_TX_FF_DEPTH-1];
+               for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
                Add_wr_gray[i]                  <=Add_wr[i+1]^Add_wr[i];
                end                             
 
@@ -359,8 +359,8 @@
         Add_rd_ungray       =0;
     else if (!Add_rd_jump_wr_pl1)       
                begin
-               Add_rd_ungray[`MAC_RX_FF_DEPTH-1]       
=Add_rd_gray_dl1[`MAC_RX_FF_DEPTH-1];   
-               for (i=`MAC_RX_FF_DEPTH-2;i>=0;i=i-1)
+               Add_rd_ungray[`MAC_TX_FF_DEPTH-1]       
=Add_rd_gray_dl1[`MAC_TX_FF_DEPTH-1];   
+               for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
                        Add_rd_ungray[i]            
=Add_rd_ungray[i+1]^Add_rd_gray_dl1[i];     
                end    
 assign          Add_wr_pluse        =Add_wr+1;
@@ -456,9 +456,9 @@
     if (Reset)
         Fifo_data_count     <=0;
     else if (FullDuplex)
-        Fifo_data_count     
<=Add_wr[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5]-Add_rd_ungray[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5];
+        Fifo_data_count     
<=Add_wr[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5]-Add_rd_ungray[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5];
     else
-        Fifo_data_count     
<=Add_wr[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5]-Add_rd_reg_dl1[`MAC_RX_FF_DEPTH-1:`MAC_RX_FF_DEPTH-5];
 //for half duplex backoff requirement
+        Fifo_data_count     
<=Add_wr[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5]-Add_rd_reg_dl1[`MAC_TX_FF_DEPTH-1:`MAC_TX_FF_DEPTH-5];
 //for half duplex backoff requirement
         
 
 always @ (posedge Clk_SYS or posedge Reset)
@@ -622,8 +622,8 @@
         Add_rd_gray         <=0;
     else 
                begin
-               Add_rd_gray[`MAC_RX_FF_DEPTH-1] <=Add_rd[`MAC_RX_FF_DEPTH-1];
-               for (i=`MAC_RX_FF_DEPTH-2;i>=0;i=i-1)
+               Add_rd_gray[`MAC_TX_FF_DEPTH-1] <=Add_rd[`MAC_TX_FF_DEPTH-1];
+               for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
                Add_rd_gray[i]                  <=Add_rd[i+1]^Add_rd[i];
                end
 //
@@ -639,8 +639,8 @@
         Add_wr_ungray       =0;
     else        
                begin
-               Add_wr_ungray[`MAC_RX_FF_DEPTH-1]       
=Add_wr_gray_dl1[`MAC_RX_FF_DEPTH-1];   
-               for (i=`MAC_RX_FF_DEPTH-2;i>=0;i=i-1)
+               Add_wr_ungray[`MAC_TX_FF_DEPTH-1]       
=Add_wr_gray_dl1[`MAC_TX_FF_DEPTH-1];   
+               for (i=`MAC_TX_FF_DEPTH-2;i>=0;i=i-1)
                        Add_wr_ungray[i]        
=Add_wr_ungray[i+1]^Add_wr_gray_dl1[i]; 
                end                   
 //empty