[Commit-gnuradio] r5862 - gnuradio/branches/developers/matt/u2f/control_lib

[matt]

Author: matt
Date: 2007-06-28 00:59:06 -0600 (Thu, 28 Jun 2007)
New Revision: 5862

Modified:
   gnuradio/branches/developers/matt/u2f/control_lib/ram_loader.v
Log:
removed delays to get rid of warnings


Modified: gnuradio/branches/developers/matt/u2f/control_lib/ram_loader.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/control_lib/ram_loader.v      
2007-06-28 06:58:29 UTC (rev 5861)
+++ gnuradio/branches/developers/matt/u2f/control_lib/ram_loader.v      
2007-06-28 06:59:06 UTC (rev 5862)
@@ -30,15 +30,15 @@
    always @(posedge clk_i or posedge rst_i)
      if(rst_i)
        begin
-         start_fsm_q <= #1 FSM1_WAIT_DETACH;
-         start_q <= #1 1'b0;
-         enable_q <= #1 1'b0;
+         start_fsm_q <= FSM1_WAIT_DETACH;
+         start_q <= 1'b0;
+         enable_q <= 1'b0;
        end
      else
        begin
-         start_fsm_q <= #1 start_fsm_s;
-         enable_q <= #1 enable_s;
-         start_q <= #1 start_s;
+         start_fsm_q <= start_fsm_s;
+         enable_q <= enable_s;
+         start_q <= start_s;
        end // else: !if(rst_i)
    
    always @*
@@ -107,36 +107,36 @@
    always @(posedge cfg_clk_i or posedge rst_i)
      if(rst_i)
        begin
-         addr_q <= #1 0;
-         shift_dat_q <= #1 8'd0;
-         ser_dat_q <= #1 8'd0;
-         bit_q <= #1 3'd0;
-         bit_ovfl_q <= #1 1'b0;
-         fsm_q <= #1 FSM2_IDLE;
-         ram_we_q <= #1 1'b0;
-         done_q <= #1 1'b0;
-         mode_q <= #1 1'b0;
+         addr_q <= 0;
+         shift_dat_q <= 8'd0;
+         ser_dat_q <= 8'd0;
+         bit_q <= 3'd0;
+         bit_ovfl_q <= 1'b0;
+         fsm_q <= FSM2_IDLE;
+         ram_we_q <= 1'b0;
+         done_q <= 1'b0;
+         mode_q <= 1'b0;
        end
      else
        begin
          if(inc_addr_s)
-           addr_q <= #1 addr_q + 1;
+           addr_q <= addr_q + 1;
          if(enable_q)
            begin
-              bit_q <= #1 bit_q + 1;
-              bit_ovfl_q <= #1 (bit_q == 3'd7);
-              shift_dat_q[0] <= #1 cfg_data_i;
-              shift_dat_q[7:1] <= #1 shift_dat_q[6:0];
+              bit_q <= bit_q + 1;
+              bit_ovfl_q <= (bit_q == 3'd7);
+              shift_dat_q[0] <= cfg_data_i;
+              shift_dat_q[7:1] <= shift_dat_q[6:0];
            end
          if(bit_ovfl_q)
-           ser_dat_q <= #1 shift_dat_q;
+           ser_dat_q <= shift_dat_q;
 
-         fsm_q <= #1 fsm_s;
+         fsm_q <= fsm_s;
 
-         ram_we_q <= #1 ram_we_s;
+         ram_we_q <= ram_we_s;
 
          if(done_s)
-           done_q <= #1 1'b1;
+           done_q <= 1'b1;
          mode_q <= mode_s;
        end // else: !if(rst_i)