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Re: [avr-libc-dev] Interrupt vector redirection scheme
From: |
Dmitry K. |
Subject: |
Re: [avr-libc-dev] Interrupt vector redirection scheme |
Date: |
Wed, 5 Sep 2007 08:46:17 +1100 |
User-agent: |
KMail/1.5 |
On Tuesday 04 September 2007 18:20, Michael Schulze wrote:
> Dmitry K. wrote:
> > On Monday 03 September 2007 19:59, Michael Schulze wrote:
> >> Hi,
> >>
> >>> Very interesting idea. Though there is a discrepancy: function
> >>> redir_func() keeps the SREG already after it is scratched (sbiw,
> >>> eor).
> >>
> >> I can't find the definition of that function. Where is it defined?
> >
> > Your file redirvec.S:
> >
> > redir_func:
> > sbiw ZL, 0 ; test for zero
> > ...
> > eor r1, r1 ; clear zero register, as assumed
> > to ...
> > in r0, _SFR_IO_ADDR(SREG) ; load status. SREG is a SFR
> > macro push r0 ; save loaded status. Assumes irqs
> > are
>
> I can't see a discrepancy. I save the SREG and restore it at the end of
> the function, because of the called function could it change. However,
> the interrupt have to ensure that the state of all registers is the same
> like before.
Check, please, the interrupt trace:
jmp TIMER1_OVR_vect
TIMER1_OVR_vect: ; naked fuction
push r31
push r30
lds r30, TIMER1_OVF_vect_REDIR
lds r31, TIMER1_OVF_vect_REDIR + 1
jmp redir_func
redir_func:
sbiw ZL, 0
So, the 'sbiw' instruction may change 5 bits of SREG before saving.
Yes?
Regards,
Dmitry.