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Re: [avr-gcc-list] SBI an CBI optimizations
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From: |
Jeff Epler |
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Subject: |
Re: [avr-gcc-list] SBI an CBI optimizations |
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Date: |
Thu, 7 Jul 2005 10:43:33 -0500 |
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User-agent: |
Mutt/1.4.1i |
On Thu, Jul 07, 2005 at 11:25:31AM -0400, Trampas wrote:
> I gave that a shot:
[... with register GIMSK, it's 3 instructions]
> Note that it appears to work on other registers:
[... with DDRD, it's a cbi instruction]
sbi/cbi only work on the first 32 I/O registers. See page 48 of the AVR
Instruction Set document (the version I am reading is 0856D–AVR–08/02).
Jeff
pgpQlkOh_lU0O.pgp
Description: PGP signature
- [avr-gcc-list] double precision bit representation, Kitts, 2005/07/06
- [avr-gcc-list] Re: double precision bit representation, Volkmar Dierkes, 2005/07/06
- Re: [avr-gcc-list] double precision bit representation, Parthasaradhi Nayani, 2005/07/06
- Re: [avr-gcc-list] double precision bit representation, Bjarne Laursen, 2005/07/07
- Re: [avr-gcc-list] SBI an CBI optimizations, Jeff Barlow, 2005/07/07
- RE: [avr-gcc-list] SBI an CBI optimizations, Trampas, 2005/07/07