[avr-gcc-list] Software JTAGICE using simulavr / limited simulavr ICE

[Mike Hudson]

Here's something to ponder over the weekend, it came up during the usual 
Friday afternoon clock-watching banter. To the best of my knowledge, it 
hasn't been discussed before:

        Would it be possible to modify simulavr (or create an external 
interface plugin) in order to create a PC hosted version of the JTAGICE 
using the parallel port? You would likely need to extern simulavr to 
emulate parallel I/O lines and a single serial port, as well as add 
support for saving the contents of the flash memory. 

        Although this approach would run slower (and be less reliable) than the 
hardware JTAGICE, it would have near zero hardware cost. ( Although we 
really should resolve the whole firmware issue with Atmel. My personal 
opinion is that they should just sell a non-commercial firmware license 
for $20)

        A side effect of adding this support would likely be the acceleration 
of development on simulavr's external peripheral interface, and the 
ability to use it as a limited ICE.

        This could be enough for many educational environments, and people 
starting out with AVRs. I know that most high-school students would be 
completely satisfied with a few I/O lines and a serial port.

Enjoy the weekend,

-- 
Mike Hudson