Re: [avr-chat] Difficulty writing eeprom with JTAGICE3

[Juergen Harms]

I have now done my next step: equipped a new board with a brand-new 
AT90CAN128: on this part I can do correct single-byte eeprom write 
operations both with the JTAG MKII and the JTAGICE3 without any problem. 
And I still can reproduce the fact that another target CPU does not 
present any problem when written with the JTAG MKII, but serious 
problems when I write with the JTAGICE3 (and I do not have the time to 
start an experiment to measure after how many writes this new part will 
start failing when writing it with the JTAGICE3).

It looks like the problem of writing eeprom with a JTAGICE3 is specific 
to parts where an eeprom position has already seen some 100 write 
operations (and that is still perfectly writeable with a JTAG MKII) - 
but to make this kind of statement, I should know more about EEPROMs.

Note that there is a problem of statistical relevance: when I say 
"always" or "never" I mean within the number of tries I can do within 
the limit of time I have, and my reluctance to do too may writes on a 
given position. But, "no problem with JTAG MKII" means that in the last 
> 5 years and handling some 50 parts I had to throw away a single part 
that I used for much development work out some 50  which never presented 
a problem, meanwhile there is an epedemy when I use the JTAGICE3.

So, it looks like a good hypothesis is to assume that the JTAGICE3 is OK 
for new parts, but presents serious problems as the number of eeprom 
writes to a given position increases.

Yes, I think that this is worth submitting a ticket to Atmel.

Juergen