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[Qemu-devel] [PULL 23/24] target/hppa: fix dcor instruction
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 23/24] target/hppa: fix dcor instruction |
Date: |
Mon, 11 Feb 2019 20:57:20 -0800 |
From: Sven Schnelle <address@hidden>
It looks like the operands where exchanged. HP bootrom tests the
following sequence:
0x00000000f0004064: ldil L%-66666800,r7
0x00000000f0004068: addi 19f,r7,r7
0x00000000f000406c: addi -1,r0,rp
0x00000000f0004070: addi f,r0,r4
0x00000000f0004074: addi 1,r4,r5
0x00000000f0004078: dcor rp,r6
0x00000000f000407c: cmpb,<>,n r6,r7,0xf000411
This returned 0x66666661 instead of the expected 0x9999999f in QEMU.
Signed-off-by: Sven Schnelle <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 026ba5cb3e..b4fd307b77 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2744,7 +2744,7 @@ static bool do_dcor(DisasContext *ctx, arg_rr_cf *a, bool
is_i)
}
tcg_gen_andi_reg(tmp, tmp, 0x11111111);
tcg_gen_muli_reg(tmp, tmp, 6);
- do_unit(ctx, a->t, tmp, load_gpr(ctx, a->r), a->cf, false,
+ do_unit(ctx, a->t, load_gpr(ctx, a->r), tmp, a->cf, false,
is_i ? tcg_gen_add_reg : tcg_gen_sub_reg);
return nullify_end(ctx);
}
--
2.17.2
- [Qemu-devel] [PULL 02/24] target/hppa: Begin using scripts/decodetree.py, (continued)
- [Qemu-devel] [PULL 02/24] target/hppa: Begin using scripts/decodetree.py, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 07/24] target/hppa: Convert arithmetic/logical insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 09/24] target/hppa: Convert fp multiply-add, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 21/24] target/hppa: Rearrange log conditions, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 03/24] target/hppa: Convert move to/from system registers, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 04/24] target/hppa: Convert remainder of system insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 06/24] target/hppa: Convert memory management insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 19/24] target/hppa: Merge translate_one into hppa_tr_translate_insn, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 20/24] target/hppa: move GETPC to HELPER() functions, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 05/24] target/hppa: Unify specializations of OR, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 23/24] target/hppa: fix dcor instruction,
Richard Henderson <=
- [Qemu-devel] [PULL 16/24] target/hppa: Convert halt/reset insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 15/24] target/hppa: Convert fp indexed memory insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 24/24] hw/hppa: forward requests to CPU HPA, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 10/24] target/hppa: Convert conditional branches, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 08/24] target/hppa: Convert indexed memory insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 11/24] target/hppa: Convert shift, extract, deposit insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 14/24] target/hppa: Convert offset memory insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 22/24] target/hppa: Fix addition '</<=' conditions, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 13/24] target/hppa: Convert arithmetic immediate insns, Richard Henderson, 2019/02/11
- [Qemu-devel] [PULL 17/24] target/hppa: Convert fp fused multiply-add insns, Richard Henderson, 2019/02/11