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[Qemu-devel] [PULL 35/42] tcg: Improve register allocation for matching
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 35/42] tcg: Improve register allocation for matching constraints |
Date: |
Wed, 26 Dec 2018 07:55:22 +1100 |
Try harder to honor the output_pref. When we're forced to allocate
a second register for the input, it does not need to use the input
constraint; that will be honored by the register we allocate for the
output and a move is already required.
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg.c | 36 ++++++++++++++++++++++++------------
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 32c66dae7d..32bac5e792 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3213,6 +3213,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
/* satisfy input constraints */
for (k = 0; k < nb_iargs; k++) {
+ TCGRegSet i_preferred_regs, o_preferred_regs;
+
i = def->sorted_args[nb_oargs + k];
arg = op->args[i];
arg_ct = &def->args_ct[i];
@@ -3223,17 +3225,18 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
/* constant is OK for instruction */
const_args[i] = 1;
new_args[i] = ts->val;
- goto iarg_end;
+ continue;
}
- temp_load(s, ts, arg_ct->u.regs, i_allocated_regs, 0);
-
+ i_preferred_regs = o_preferred_regs = 0;
if (arg_ct->ct & TCG_CT_IALIAS) {
+ o_preferred_regs = op->output_pref[arg_ct->alias_index];
if (ts->fixed_reg) {
/* if fixed register, we must allocate a new register
if the alias is not the same register */
- if (arg != op->args[arg_ct->alias_index])
+ if (arg != op->args[arg_ct->alias_index]) {
goto allocate_in_reg;
+ }
} else {
/* if the input is aliased to an output and if it is
not dead after the instruction, we must allocate
@@ -3241,33 +3244,42 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
if (!IS_DEAD_ARG(i)) {
goto allocate_in_reg;
}
+
/* check if the current register has already been allocated
for another input aliased to an output */
- int k2, i2;
- for (k2 = 0 ; k2 < k ; k2++) {
- i2 = def->sorted_args[nb_oargs + k2];
- if ((def->args_ct[i2].ct & TCG_CT_IALIAS) &&
- (new_args[i2] == ts->reg)) {
- goto allocate_in_reg;
+ if (ts->val_type == TEMP_VAL_REG) {
+ int k2, i2;
+ reg = ts->reg;
+ for (k2 = 0 ; k2 < k ; k2++) {
+ i2 = def->sorted_args[nb_oargs + k2];
+ if ((def->args_ct[i2].ct & TCG_CT_IALIAS) &&
+ reg == new_args[i2]) {
+ goto allocate_in_reg;
+ }
}
}
+ i_preferred_regs = o_preferred_regs;
}
}
+
+ temp_load(s, ts, arg_ct->u.regs, i_allocated_regs, i_preferred_regs);
reg = ts->reg;
+
if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
/* nothing to do : the constraint is satisfied */
} else {
allocate_in_reg:
/* allocate a new register matching the constraint
and move the temporary register into it */
+ temp_load(s, ts, tcg_target_available_regs[ts->type],
+ i_allocated_regs, 0);
reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
- 0, ts->indirect_base);
+ o_preferred_regs, ts->indirect_base);
tcg_out_mov(s, ts->type, reg, ts->reg);
}
new_args[i] = reg;
const_args[i] = 0;
tcg_regset_set_reg(i_allocated_regs, reg);
- iarg_end: ;
}
/* mark dead temporaries and free the associated registers */
--
2.17.2
- [Qemu-devel] [PULL 25/42] linux-user: Add safe_syscall for riscv64 host, (continued)
- [Qemu-devel] [PULL 25/42] linux-user: Add safe_syscall for riscv64 host, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 26/42] tcg: Renumber TCG_CALL_* flags, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 27/42] tcg: Add TCG_CALL_NO_RETURN, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 28/42] tcg: Reference count labels, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 29/42] tcg: Add reachable_code_pass, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 30/42] tcg: Add preferred_reg argument to tcg_reg_alloc, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 31/42] tcg: Add preferred_reg argument to temp_load, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 32/42] tcg: Add preferred_reg argument to temp_sync, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 33/42] tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 34/42] tcg: Add output_pref to TCGOp, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 35/42] tcg: Improve register allocation for matching constraints,
Richard Henderson <=
- [Qemu-devel] [PULL 36/42] tcg: Dump register preference info with liveness, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 37/42] tcg: Reindent parts of liveness_pass_1, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 38/42] tcg: Rename and adjust liveness_pass_1 helpers, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 39/42] tcg: Split out more subroutines from liveness_pass_1, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 40/42] tcg: Add TCG_OPF_BB_EXIT, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 41/42] tcg: Record register preferences during liveness, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 42/42] tcg: Improve call argument loading, Richard Henderson, 2018/12/25