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[Qemu-devel] [PULL 32/42] tcg: Add preferred_reg argument to temp_sync
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 32/42] tcg: Add preferred_reg argument to temp_sync |
Date: |
Wed, 26 Dec 2018 07:55:19 +1100 |
Pass this through to tcg_reg_alloc.
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 351d302a68..fe060c481a 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2865,8 +2865,8 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
registers needs to be allocated to store a constant. If 'free_or_dead'
is non-zero, subsequently release the temporary; if it is positive, the
temp is dead; if it is negative, the temp is free. */
-static void temp_sync(TCGContext *s, TCGTemp *ts,
- TCGRegSet allocated_regs, int free_or_dead)
+static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
+ TCGRegSet preferred_regs, int free_or_dead)
{
if (ts->fixed_reg) {
return;
@@ -2886,7 +2886,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts,
break;
}
temp_load(s, ts, tcg_target_available_regs[ts->type],
- allocated_regs, 0);
+ allocated_regs, preferred_regs);
/* fallthrough */
case TEMP_VAL_REG:
@@ -2913,7 +2913,7 @@ static void tcg_reg_free(TCGContext *s, TCGReg reg,
TCGRegSet allocated_regs)
{
TCGTemp *ts = s->reg_to_temp[reg];
if (ts != NULL) {
- temp_sync(s, ts, allocated_regs, -1);
+ temp_sync(s, ts, allocated_regs, 0, -1);
}
}
@@ -3093,7 +3093,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp
*ots,
ots->val = val;
ots->mem_coherent = 0;
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, s->reserved_regs, IS_DEAD_ARG(0));
+ temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0));
} else if (IS_DEAD_ARG(0)) {
temp_dead(s, ots);
}
@@ -3176,7 +3176,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp
*op)
ots->mem_coherent = 0;
s->reg_to_temp[ots->reg] = ots;
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, allocated_regs, 0);
+ temp_sync(s, ots, allocated_regs, 0, 0);
}
}
}
@@ -3346,7 +3346,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
tcg_out_mov(s, ts->type, ts->reg, reg);
}
if (NEED_SYNC_ARG(i)) {
- temp_sync(s, ts, o_allocated_regs, IS_DEAD_ARG(i));
+ temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
} else if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
}
@@ -3480,7 +3480,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
ts->mem_coherent = 0;
s->reg_to_temp[reg] = ts;
if (NEED_SYNC_ARG(i)) {
- temp_sync(s, ts, allocated_regs, IS_DEAD_ARG(i));
+ temp_sync(s, ts, allocated_regs, 0, IS_DEAD_ARG(i));
} else if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
}
--
2.17.2
- [Qemu-devel] [PULL 22/42] disas: Add RISC-V support, (continued)
- [Qemu-devel] [PULL 22/42] disas: Add RISC-V support, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 23/42] configure: Add support for building RISC-V host, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 24/42] disas/microblaze: Remove unused REG_SP macro, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 25/42] linux-user: Add safe_syscall for riscv64 host, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 26/42] tcg: Renumber TCG_CALL_* flags, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 27/42] tcg: Add TCG_CALL_NO_RETURN, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 28/42] tcg: Reference count labels, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 29/42] tcg: Add reachable_code_pass, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 30/42] tcg: Add preferred_reg argument to tcg_reg_alloc, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 31/42] tcg: Add preferred_reg argument to temp_load, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 32/42] tcg: Add preferred_reg argument to temp_sync,
Richard Henderson <=
- [Qemu-devel] [PULL 33/42] tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 34/42] tcg: Add output_pref to TCGOp, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 35/42] tcg: Improve register allocation for matching constraints, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 36/42] tcg: Dump register preference info with liveness, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 37/42] tcg: Reindent parts of liveness_pass_1, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 38/42] tcg: Rename and adjust liveness_pass_1 helpers, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 39/42] tcg: Split out more subroutines from liveness_pass_1, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 40/42] tcg: Add TCG_OPF_BB_EXIT, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 41/42] tcg: Record register preferences during liveness, Richard Henderson, 2018/12/25
- [Qemu-devel] [PULL 42/42] tcg: Improve call argument loading, Richard Henderson, 2018/12/25