Re: [Qemu-devel] [PATCH v3 03/10] target/arm: Convert v8 extensions from feature bits to isar tests

[Peter Maydell]

On 8 October 2018 at 22:21, Richard Henderson
<address@hidden> wrote:
> Most of the v8 extensions are self-contained within the ISAR
> registers and are not implied by other feature bits, which
> makes them the easiest to convert.
>
> Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>

> diff --git a/target/arm/translate.h b/target/arm/translate.h
> index c1b65f3efb..1d60569583 100644
> --- a/target/arm/translate.h
> +++ b/target/arm/translate.h
> @@ -7,6 +7,7 @@
>  /* internal defines */
>  typedef struct DisasContext {
>      DisasContextBase base;
> +    ARMCPU *cpu;  /* for access to the id_* registers */

The translate code is not supposed to have access to either ARMCPU
or the ARMCPUState env pointer. Putting a pointer to cpu into the
DisasContext defeats this. This is why aarch64_tr_init_disas_context()
and the 32-bit equivalent extract all the info they need from
arm_cpu and env and put it into DisasContext fields.

thanks
-- PMM