Re: [Qemu-devel] [PATCH v4 04/22] target/mips: Add CPO PWBase register

[Aleksandar Markovic]

> From: Yongbok Kim <address@hidden>
> 
> Add PWBase register (CP0 Register 5, Select 5).
> 
> The PWBase register contains the Page Table Base virtual address.
>
> This register is required for the hardware page walker feature. It
> exists only if Config3 PW bit is set to 1.
> 
> Signed-off-by: Yongbok Kim <address@hidden>
> Signed-off-by: Aleksandar Markovic <address@hidden>
> ---

The only problem with this and subsequent register-related patches is that
they do not bump version_id and minimum_version_id of vmstate_mips_cpu
in machine.c, and they should.

Other than this:

Reviewed-by: Aleksandar Markovic <address@hidden>