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[Qemu-arm] [PATCH v2 09/12] target-arm: powerctl: Enable HVC when starti
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-arm] [PATCH v2 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2 |
Date: |
Thu, 11 Oct 2018 04:19:28 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
When QEMU provides the equivalent of the EL3 firmware, we
need to enable HVCs in scr_el3 when turning on CPUs that
target EL2.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/arm/arm-powerctl.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c
index ce55eeb682..2b856930fb 100644
--- a/target/arm/arm-powerctl.c
+++ b/target/arm/arm-powerctl.c
@@ -103,6 +103,16 @@ static void arm_set_cpu_on_async_work(CPUState
*target_cpu_state,
} else {
/* Processor is not in secure mode */
target_cpu->env.cp15.scr_el3 |= SCR_NS;
+
+ /*
+ * If QEMU is providing the equivalent of EL3 firmware, then we need
+ * to make sure a CPU targeting EL2 comes out of reset with a
+ * functional HVC insn.
+ */
+ if (arm_feature(&target_cpu->env, ARM_FEATURE_EL3)
+ && info->target_el == 2) {
+ target_cpu->env.cp15.scr_el3 |= SCR_HCE;
+ }
}
/* We check if the started CPU is now at the correct level */
--
2.17.1
- [Qemu-arm] [PATCH v2 00/12] arm: Add first models of Xilinx Versal SoC, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 01/12] net: cadence_gem: Disable TSU feature bit, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 02/12] net: cadence_gem: Announce availability of priority queues, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 04/12] net: cadence_gem: Add macro with max number of descriptor words, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2,
Edgar E. Iglesias <=
- [Qemu-arm] [PATCH v2 05/12] net: cadence_gem: Add support for extended descriptors, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 10/12] target/arm: Add the Cortex-A72, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 07/12] net: cadence_gem: Implement support for 64bit descriptor addresses, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 08/12] net: cadence_gem: Announce 64bit addressing support, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 11/12] hw/arm: versal: Add a model of Xilinx Versal SoC, Edgar E. Iglesias, 2018/10/10
- [Qemu-arm] [PATCH v2 12/12] hw/arm: versal: Add a virtual Xilinx Versal board, Edgar E. Iglesias, 2018/10/10
- Re: [Qemu-arm] [PATCH v2 00/12] arm: Add first models of Xilinx Versal SoC, Peter Maydell, 2018/10/16