|
From: | Neal Becker |
Subject: | [Discuss-gnuradio] design flow question |
Date: | Wed, 27 Feb 2008 08:07:20 -0500 |
User-agent: | KNode/0.10.5 |
Newb here. I'm wondering what you are using for a design flow to produce fpga code? I assume you are obtaining verilog? What tools are used to produce the verilog and work with it?
[Prev in Thread] | Current Thread | [Next in Thread] |