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[Qemu-commits] [qemu/qemu] b70ec5: tests/docker/dockerfiles: Add debian-
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] b70ec5: tests/docker/dockerfiles: Add debian-loongarch-cro... |
Date: |
Wed, 20 Jul 2022 03:50:46 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b70ec50b9d1e552a60beef6e0d689fb746963358
https://github.com/qemu/qemu/commit/b70ec50b9d1e552a60beef6e0d689fb746963358
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M configure
M tests/docker/Makefile.include
A tests/docker/dockerfiles/debian-loongarch-cross.docker
Log Message:
-----------
tests/docker/dockerfiles: Add debian-loongarch-cross.docker
Use the pre-packaged toolchain provided by Loongson via github.
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220704070824.965429-1-richard.henderson@linaro.org>
Commit: c254f7affe9bb7303241c23cca66eb31f5effc1f
https://github.com/qemu/qemu/commit/c254f7affe9bb7303241c23cca66eb31f5effc1f
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/cpu.c
Log Message:
-----------
target/loongarch: Fix loongarch_cpu_class_by_name
The cpu_model argument may already have the '-loongarch-cpu' suffix,
e.g. when using the default for the LS7A1000 machine. If that fails,
try again with the suffix. Validate that the object created by the
function is derived from the proper base class.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-2-yangxiaojuan@loongson.cn>
[rth: Try without and then with the suffix, to avoid testsuite breakage.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 056dac5384dd4f9f3f2ead0585c4be6104c04d00
https://github.com/qemu/qemu/commit/056dac5384dd4f9f3f2ead0585c4be6104c04d00
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M hw/intc/loongarch_pch_pic.c
Log Message:
-----------
hw/intc/loongarch_pch_pic: Fix bugs for update_irq function
Fix such errors:
1. We should not use 'unsigned long' type as argument when we use
find_first_bit(), and we use ctz64() to replace find_first_bit()
to fix this bug.
2. It is not standard to use '1ULL << irq' to generate a irq mask.
So, we replace it with 'MAKE_64BIT_MASK(irq, 1)'.
Fix coverity CID: 1489761 1489764 1489765
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220715060740.1500628-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e4ad16f49227be90838511deb03480dc720e76bf
https://github.com/qemu/qemu/commit/e4ad16f49227be90838511deb03480dc720e76bf
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/cpu.c
Log Message:
-----------
target/loongarch/cpu: Fix coverity errors about excp_names
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2b3ef8e5c607130dc5a70f12cc7c6ee68c3844df
https://github.com/qemu/qemu/commit/2b3ef8e5c607130dc5a70f12cc7c6ee68c3844df
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/tlb_helper.c
Log Message:
-----------
target/loongarch/tlb_helper: Fix coverity integer overflow error
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 064357041d64331e3dbc18629d07abf88ce0f6bb
https://github.com/qemu/qemu/commit/064357041d64331e3dbc18629d07abf88ce0f6bb
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/op_helper.c
Log Message:
-----------
target/loongarch/op_helper: Fix coverity cond_at_most error
The boundary size of cpucfg array should be 0 to ARRAY_SIZE(cpucfg)-1.
So, using index bigger than max boundary to access cpucfg[] must be
forbidden.
Fix coverity CID: 1489760
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fa90456f78b5f49515bbf6393fa10a1d70a5bf86
https://github.com/qemu/qemu/commit/fa90456f78b5f49515bbf6393fa10a1d70a5bf86
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/cpu.c
Log Message:
-----------
target/loongarch/cpu: Fix cpucfg default value
We should config cpucfg[20] to set value for the scache's ways, sets,
and size arguments when loongarch cpu init. However, the old code
wirte 'sets argument' twice, so we change one of them to 'size argument'.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715064829.1521482-1-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2344f98e9cf78d508758a7f0c9e0b4d0d37acf3d
https://github.com/qemu/qemu/commit/2344f98e9cf78d508758a7f0c9e0b4d0d37acf3d
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M fpu/softfloat-specialize.c.inc
Log Message:
-----------
fpu/softfloat: Add LoongArch specializations for pickNaN*
The muladd (inf,zero,nan) case sets InvalidOp and returns the
input value 'c', and prefer sNaN over qNaN, in c,a,b order.
Binary operations prefer sNaN over qNaN and a,b order.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-3-gaosong@loongson.cn>
[rth: Add specialization for pickNaN]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9fad2071e8de2e5902e68d93d394cfe2f29ff90b
https://github.com/qemu/qemu/commit/9fad2071e8de2e5902e68d93d394cfe2f29ff90b
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M target/loongarch/fpu_helper.c
Log Message:
-----------
target/loongarch: Fix float_convd/float_convs test failing
We should result zero when exception is invalid and operation is nan
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-4-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 79e853b584ff097f410638c52a3d60b5ca044ad5
https://github.com/qemu/qemu/commit/79e853b584ff097f410638c52a3d60b5ca044ad5
Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
A tests/tcg/loongarch64/float_convd.ref
A tests/tcg/loongarch64/float_convs.ref
A tests/tcg/loongarch64/float_madds.ref
Log Message:
-----------
tests/tcg/loongarch64: Add float reference files
Generated on Loongson-3A5000 (CPU revision 0x0014c011).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220104132022.2146857-1-f4bug@amsat.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-2-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a5661c3ab5d1bf32d1284ee523d33151f3c525aa
https://github.com/qemu/qemu/commit/a5661c3ab5d1bf32d1284ee523d33151f3c525aa
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
A tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/test_bit.c
Log Message:
-----------
tests/tcg/loongarch64: Add clo related instructions test
This includes:
- CL{O/Z}.{W/D}
- CT{O/Z}.{W/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-5-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fa50579a57abd271109117936c6886d2d1e3d9af
https://github.com/qemu/qemu/commit/fa50579a57abd271109117936c6886d2d1e3d9af
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/test_div.c
Log Message:
-----------
tests/tcg/loongarch64: Add div and mod related instructions test
This includes:
- DIV.{W[U]/D[U]}
- MOD.{W[U]/D[U]}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-6-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 65cb15f4d64678900e48375ee360cc6cf577b99f
https://github.com/qemu/qemu/commit/65cb15f4d64678900e48375ee360cc6cf577b99f
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/test_fclass.c
Log Message:
-----------
tests/tcg/loongarch64: Add fclass test
This includes:
- FCLASS.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-7-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 500cd33abb5f0eb6303e35ccd808143298c3aba0
https://github.com/qemu/qemu/commit/500cd33abb5f0eb6303e35ccd808143298c3aba0
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/test_fpcom.c
Log Message:
-----------
tests/tcg/loongarch64: Add fp comparison instructions test
Choose some instructions to test:
- FCMP.cond.S
- cond: ceq clt cle cne seq slt sle sne
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-8-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0c7213dd668215d00aa56002f7a0193284b6c1a2
https://github.com/qemu/qemu/commit/0c7213dd668215d00aa56002f7a0193284b6c1a2
Author: Song Gao <gaosong@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/test_pcadd.c
Log Message:
-----------
tests/tcg/loongarch64: Add pcadd related instructions test
This includes:
- PCADDI
- PCADDU12I
- PCADDU18I
- PCALAU12I
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-9-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 27ad7564e788103157114a3bd5a5355bd19eed72
https://github.com/qemu/qemu/commit/27ad7564e788103157114a3bd5a5355bd19eed72
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
A hw/loongarch/fw_cfg.c
A hw/loongarch/fw_cfg.h
M hw/loongarch/loongson3.c
M hw/loongarch/meson.build
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch: Add fw_cfg table support
Add fw_cfg table for loongarch virt machine, including memmap table.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-2-yangxiaojuan@loongson.cn>
[rth: Replace fprintf with assert; drop unused return value;
initialize reserved slot to zero.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 98afb0d4e95322d728375a1171a5f77a9eeb4d68
https://github.com/qemu/qemu/commit/98afb0d4e95322d728375a1171a5f77a9eeb4d68
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M hw/loongarch/loongson3.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch: Add uefi bios loading support
Add uefi bios loading support, now only uefi bios is porting to
loongarch virt machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fb1cd3a2925ee3479b1a82adb2df967952a94300
https://github.com/qemu/qemu/commit/fb1cd3a2925ee3479b1a82adb2df967952a94300
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M hw/loongarch/loongson3.c
Log Message:
-----------
hw/loongarch: Add linux kernel booting support
There are two situations to start system by kernel file. If exists bios
option, system will boot from loaded bios file, else system will boot
from hardcoded auxcode, and jump to kernel elf entry.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3efa6fa1e629b91400e020be42e118fedd8f11ce
https://github.com/qemu/qemu/commit/3efa6fa1e629b91400e020be42e118fedd8f11ce
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M hw/loongarch/Kconfig
M hw/loongarch/loongson3.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch: Add smbios support
Add smbios support for loongarch virt machine, and put them into fw_cfg
table so that bios can parse them quickly. The weblink of smbios spec:
https://www.dmtf.org/dsp/DSP0134, the version is 3.6.0.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 735143f10d3e74523f25444c57d61d51ffd57167
https://github.com/qemu/qemu/commit/735143f10d3e74523f25444c57d61d51ffd57167
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M hw/loongarch/Kconfig
A hw/loongarch/acpi-build.c
M hw/loongarch/loongson3.c
M hw/loongarch/meson.build
M include/hw/loongarch/virt.h
M include/hw/pci-host/ls7a.h
Log Message:
-----------
hw/loongarch: Add acpi ged support
Loongarch virt machine uses general hardware reduces acpi method, rather
than LS7A acpi device. Now only power management function is used in
acpi ged device, memory hotplug will be added later. Also acpi tables
such as RSDP/RSDT/FADT etc.
The acpi table has submited to acpi spec, and will release soon.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fda3f15b0079d4bba76791502a7e00b8b747f509
https://github.com/qemu/qemu/commit/fda3f15b0079d4bba76791502a7e00b8b747f509
Author: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M configs/targets/loongarch64-softmmu.mak
M hw/loongarch/loongson3.c
M hw/loongarch/meson.build
M include/hw/loongarch/virt.h
M target/loongarch/cpu.c
M target/loongarch/cpu.h
Log Message:
-----------
hw/loongarch: Add fdt support
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node,
pcie node into it, and create fdt rom memory region. Now fdt info is not
full since only uefi bios uses fdt, linux kernel does not use fdt.
Loongarch Linux kernel uses acpi table which is full in qemu virt
machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-7-yangxiaojuan@loongson.cn>
[rth: Set TARGET_NEED_FDT, add fdt to meson.build]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 68e26e1e812c8b09313d7929271f6cbd47ef4c07
https://github.com/qemu/qemu/commit/68e26e1e812c8b09313d7929271f6cbd47ef4c07
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2022-07-19 (Tue, 19 Jul 2022)
Changed paths:
M configs/targets/loongarch64-softmmu.mak
M configure
M fpu/softfloat-specialize.c.inc
M hw/intc/loongarch_pch_pic.c
M hw/loongarch/Kconfig
A hw/loongarch/acpi-build.c
A hw/loongarch/fw_cfg.c
A hw/loongarch/fw_cfg.h
M hw/loongarch/loongson3.c
M hw/loongarch/meson.build
M include/hw/loongarch/virt.h
M include/hw/pci-host/ls7a.h
M target/loongarch/cpu.c
M target/loongarch/cpu.h
M target/loongarch/fpu_helper.c
M target/loongarch/op_helper.c
M target/loongarch/tlb_helper.c
M tests/docker/Makefile.include
A tests/docker/dockerfiles/debian-loongarch-cross.docker
A tests/tcg/loongarch64/Makefile.target
A tests/tcg/loongarch64/float_convd.ref
A tests/tcg/loongarch64/float_convs.ref
A tests/tcg/loongarch64/float_madds.ref
A tests/tcg/loongarch64/test_bit.c
A tests/tcg/loongarch64/test_div.c
A tests/tcg/loongarch64/test_fclass.c
A tests/tcg/loongarch64/test_fpcom.c
A tests/tcg/loongarch64/test_pcadd.c
Log Message:
-----------
Merge tag 'pull-la-20220719' of https://gitlab.com/rth7680/qemu into staging
LoongArch64 patch queue:
Add dockerfile for loongarch cross compile
Add reference files for float tests.
Add simple tests for div, mod, clo, fclass, fcmp, pcadd
Add bios and kernel boot support.
Add smbios, acpi, and fdt support.
Fix pch-pic update-irq.
Fix some errors identified by coverity.
# gpg: Signature made Tue 19 Jul 2022 18:26:04 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-la-20220719' of https://gitlab.com/rth7680/qemu: (21 commits)
hw/loongarch: Add fdt support
hw/loongarch: Add acpi ged support
hw/loongarch: Add smbios support
hw/loongarch: Add linux kernel booting support
hw/loongarch: Add uefi bios loading support
hw/loongarch: Add fw_cfg table support
tests/tcg/loongarch64: Add pcadd related instructions test
tests/tcg/loongarch64: Add fp comparison instructions test
tests/tcg/loongarch64: Add fclass test
tests/tcg/loongarch64: Add div and mod related instructions test
tests/tcg/loongarch64: Add clo related instructions test
tests/tcg/loongarch64: Add float reference files
target/loongarch: Fix float_convd/float_convs test failing
fpu/softfloat: Add LoongArch specializations for pickNaN*
target/loongarch/cpu: Fix cpucfg default value
target/loongarch/op_helper: Fix coverity cond_at_most error
target/loongarch/tlb_helper: Fix coverity integer overflow error
target/loongarch/cpu: Fix coverity errors about excp_names
hw/intc/loongarch_pch_pic: Fix bugs for update_irq function
target/loongarch: Fix loongarch_cpu_class_by_name
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/d48125de38f4...68e26e1e812c