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[Qemu-commits] [qemu/qemu] 72d680: target/mips: introduce decodetree str


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 72d680: target/mips: introduce decodetree structure for Ca...
Date: Thu, 14 Jul 2022 01:30:51 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 72d680e4083a75c55d89c55f799cbe870ebbc7a5
      
https://github.com/qemu/qemu/commit/72d680e4083a75c55d89c55f799cbe870ebbc7a5
  Author: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/mips-defs.h
    M target/mips/tcg/meson.build
    A target/mips/tcg/octeon.decode
    A target/mips/tcg/octeon_translate.c
    M target/mips/tcg/translate.c
    M target/mips/tcg/translate.h

  Log Message:
  -----------
  target/mips: introduce decodetree structure for Cavium Octeon extension

This patch adds decodetree for Cavium Octeon extension and
an instruction set extension flag for using it in CPU models.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572672162.167724.13656301229517693806.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 5e806fb00214142377bcbf7da8e79c62556d142c
      
https://github.com/qemu/qemu/commit/5e806fb00214142377bcbf7da8e79c62556d142c
  Author: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/octeon.decode
    M target/mips/tcg/octeon_translate.c

  Log Message:
  -----------
  target/mips: implement Octeon-specific BBIT instructions

This patch introduces Octeon-specific decoder and implements
check-bit-and-jump instructions.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572672705.167724.16667636081912075906.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: dadd071a9c3f4de71e89e0db8becf40603265fe8
      
https://github.com/qemu/qemu/commit/dadd071a9c3f4de71e89e0db8becf40603265fe8
  Author: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/octeon.decode
    M target/mips/tcg/octeon_translate.c

  Log Message:
  -----------
  target/mips: implement Octeon-specific arithmetic instructions

This patch implements several Octeon-specific instructions:
- BADDU
- DMUL
- EXTS/EXTS32
- CINS/CINS32
- POP/DPOP
- SEQ/SEQI
- SNE/SNEI

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <165572673245.167724.17377788816335619000.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 9a6046a655626b146b619baec5b39cb3d6e28221
      
https://github.com/qemu/qemu/commit/9a6046a655626b146b619baec5b39cb3d6e28221
  Author: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/cpu-defs.c.inc

  Log Message:
  -----------
  target/mips: introduce Cavium Octeon CPU model

This patch adds Cavium Octeon 68XX vCPU which provides
Octeon-specific instructions.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <165572673785.167724.7604881144978983510.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: d53a3ed44605f7f070add30729e93bc7971ff6b1
      
https://github.com/qemu/qemu/commit/d53a3ed44605f7f070add30729e93bc7971ff6b1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Create report_fault for semihosting

The UHI specification does not have an EFAULT value,
and further specifies that "undefined UHI operations
should not return control to the target".

So, log the error and abort.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-2-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3d748e41c759c7d207806b136be7694cfe2b6d65
      
https://github.com/qemu/qemu/commit/3d748e41c759c7d207806b136be7694cfe2b6d65
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Drop link syscall from semihosting

We don't implement it with _WIN32 hosts, and the syscall
is missing from the gdb remote file i/o interface.
Since we can't implement it universally, drop it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-3-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 18639a28bb313195308a97cacb6aa6a418fd73db
      
https://github.com/qemu/qemu/commit/18639a28bb313195308a97cacb6aa6a418fd73db
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Use semihosting/syscalls.h

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-4-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: ea4210600db3c5721f90d46d9ad9ece120010041
      
https://github.com/qemu/qemu/commit/ea4210600db3c5721f90d46d9ad9ece120010041
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Avoid qemu_semihosting_log_out for UHI_plog

Use semihost_sys_write and/or qemu_semihosting_console_write
for implementing plog.  When using gdbstub, copy the temp
string below the stack so that gdb has a guest address from
which to perform the log.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-5-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 412411b352d4b9226e5a506fdb6cadd17b83ba4a
      
https://github.com/qemu/qemu/commit/412411b352d4b9226e5a506fdb6cadd17b83ba4a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Use error_report for UHI_assert

Always log the assert locally.  Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings before the abort().

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-6-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 938fcd741ad656b2c4aeb1654bfc4ff221c26bbf
      
https://github.com/qemu/qemu/commit/938fcd741ad656b2c4aeb1654bfc4ff221c26bbf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M include/semihosting/console.h
    M semihosting/console.c

  Log Message:
  -----------
  semihosting: Remove qemu_semihosting_log_out

The function is no longer used.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220628111701.677216-7-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 3bb45bbc6fa59f35ab42e39ea4f4bcf67fea8d5f
      
https://github.com/qemu/qemu/commit/3bb45bbc6fa59f35ab42e39ea4f4bcf67fea8d5f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Simplify UHI_argnlen and UHI_argn

With semihosting_get_arg, we already have a check vs argc, so
there's no point replicating it -- just check the result vs NULL.
Merge copy_argn_to_target into its caller.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-8-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: b10ccec10096a27bb3b99a7291d5a3d5c826a1f3
      
https://github.com/qemu/qemu/commit/b10ccec10096a27bb3b99a7291d5a3d5c826a1f3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M target/mips/tcg/sysemu/mips-semi.c

  Log Message:
  -----------
  target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING

Inline these macros into the only two callers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220628111701.677216-9-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  Commit: 455c62d85f72037ea3ca4b709ad73965c65158b2
      
https://github.com/qemu/qemu/commit/455c62d85f72037ea3ca4b709ad73965c65158b2
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-07-13 (Wed, 13 Jul 2022)

  Changed paths:
    M include/semihosting/console.h
    M semihosting/console.c
    M target/mips/cpu-defs.c.inc
    M target/mips/mips-defs.h
    M target/mips/tcg/meson.build
    A target/mips/tcg/octeon.decode
    A target/mips/tcg/octeon_translate.c
    M target/mips/tcg/sysemu/mips-semi.c
    M target/mips/tcg/translate.c
    M target/mips/tcg/translate.h

  Log Message:
  -----------
  Merge tag 'mips-20220712' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Cavium Octeon MIPS extension and CPU model (Pavel Dovgalyuk)
- Semihosting cleanup (Richard Henderson)

# gpg: Signature made Tue 12 Jul 2022 21:52:52 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" 
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'mips-20220712' of https://github.com/philmd/qemu:
  target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING
  target/mips: Simplify UHI_argnlen and UHI_argn
  semihosting: Remove qemu_semihosting_log_out
  target/mips: Use error_report for UHI_assert
  target/mips: Avoid qemu_semihosting_log_out for UHI_plog
  target/mips: Use semihosting/syscalls.h
  target/mips: Drop link syscall from semihosting
  target/mips: Create report_fault for semihosting
  target/mips: introduce Cavium Octeon CPU model
  target/mips: implement Octeon-specific arithmetic instructions
  target/mips: implement Octeon-specific BBIT instructions
  target/mips: introduce decodetree structure for Cavium Octeon extension

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/824824d12217...455c62d85f72



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