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[PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine
From: |
Xiong Yining |
Subject: |
[PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine |
Date: |
Fri, 26 Apr 2024 07:35:53 +0000 |
From: xiongyining1480 <xiongyining1480@phytium.com.cn>
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
docs/system/arm/sbsa.rst | 4 ++++
hw/arm/sbsa-ref.c | 37 ++++++++++++++++++++++++++++++++++++-
2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index 2bf22a1d0b..783b87cad7 100644
--- a/docs/system/arm/sbsa.rst
+++ b/docs/system/arm/sbsa.rst
@@ -62,6 +62,7 @@ The devicetree reports:
- platform version
- GIC addresses
- NUMA node id for CPUs and memory
+ - CPU topology information
Platform version
''''''''''''''''
@@ -88,3 +89,6 @@ Platform version changes:
0.3
The USB controller is an XHCI device, not EHCI.
+
+0.4
+ CPU topology information is present in devicetree
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f5709d6c14..0c2ebe0417 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -210,7 +210,7 @@ static void create_fdt(SBSAMachineState *sms)
* fw compatibility.
*/
qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0);
- qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3);
+ qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 4);
if (ms->numa_state->have_numa_distance) {
int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t);
@@ -264,9 +264,43 @@ static void create_fdt(SBSAMachineState *sms)
ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
}
+ qemu_fdt_setprop_cell(sms->fdt, nodename, "phandle",
+ qemu_fdt_alloc_phandle(sms->fdt));
+
g_free(nodename);
}
+ /*
+ * Add vCPU topology description through fdt node cpu-map.
+ * See fdt_add_cpu_nodes() on hw/arm/virt.c for longer description.
+ */
+ qemu_fdt_add_subnode(sms->fdt, "/cpus/cpu-map");
+
+ for (cpu = sms->smp_cpus - 1; cpu >= 0; cpu--) {
+ char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
+ char *map_path;
+
+ if (ms->smp.threads > 1) {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster%d/core%d/thread%d",
+ cpu / (ms->smp.clusters * ms->smp.cores * ms->smp.threads),
+ (cpu / (ms->smp.cores * ms->smp.threads)) % ms->smp.clusters,
+ (cpu / ms->smp.threads) % ms->smp.cores,
+ cpu % ms->smp.threads);
+ } else {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster%d/core%d",
+ cpu / (ms->smp.clusters * ms->smp.cores),
+ (cpu / ms->smp.cores) % ms->smp.clusters,
+ cpu % ms->smp.cores);
+ }
+ qemu_fdt_add_path(sms->fdt, map_path);
+ qemu_fdt_setprop_phandle(sms->fdt, map_path, "cpu", cpu_path);
+
+ g_free(map_path);
+ g_free(cpu_path);
+ }
+
sbsa_fdt_add_gic_node(sms);
}
@@ -886,6 +920,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 1 * GiB;
mc->default_ram_id = "sbsa-ref.ram";
mc->default_cpus = 4;
+ mc->smp_props.clusters_supported = true;
mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props;
mc->get_default_cpu_node_id = sbsa_ref_get_default_cpu_node_id;
--
2.34.1