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Re: [RFC PATCH v3 17/21] hw/intc/arm_gicv3: Add NMI handling CPU interfa
From: |
Peter Maydell |
Subject: |
Re: [RFC PATCH v3 17/21] hw/intc/arm_gicv3: Add NMI handling CPU interface registers |
Date: |
Mon, 26 Feb 2024 11:32:17 +0000 |
On Fri, 23 Feb 2024 at 20:53, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 2/23/24 00:32, Jinjie Ruan via wrote:
> > Add the NMIAR CPU interface registers which deal with acknowledging NMI.
> >
> > When introduce NMI interrupt, there are some updates to the semantics for
> > the
> > register ICC_IAR1_EL1 and ICC_HPPIR1_EL1. For ICC_IAR1_EL1 register, it
> > should return 1022 if the intid has super priority. And for ICC_NMIAR1_EL1
> > register, it should return 1023 if the intid do not have super priority.
> > Howerever, these are not necessary for ICC_HPPIR1_EL1 register.
> >
> > Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> > +static uint64_t icc_nmiar1_read(CPUARMState *env, const ARMCPRegInfo *ri)
> > +{
> > + GICv3CPUState *cs = icc_cs_from_env(env);
> > + uint64_t intid;
> > +
> > + if (icv_access(env, HCR_IMO)) {
> > + return icv_iar_read(env, ri);
> > + }
> > +
> > + if (!icc_hppi_can_preempt(cs)) {
> > + intid = INTID_SPURIOUS;
> > + } else {
> > + intid = icc_hppir1_value(cs, env, true, false);
>
> Here... believe that the result *should* only consider superpriority. I
> guess SPURIOUS is
> the correct result when there is no pending interrupt with superpriority?
> It's really
> unclear to me from the register description.
Should be 1023: the ICC_NMIAR1_EL1[] pseudocode in the GIC
architecture spec (13.1.8) does this:
if !IsNMI(intID) then
return ZeroExtend(INTID_SPURIOUS);
(Note that the logic is "find the highest priority
pending interrupt, and then see if it is an NMI or not",
not "find the highest priority pending NMI".)
-- PMM
- [RFC PATCH v3 06/21] target/arm: Add support for Non-maskable Interrupt, (continued)
- [RFC PATCH v3 06/21] target/arm: Add support for Non-maskable Interrupt, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 18/21] hw/intc/arm_gicv3: Implement NMI interrupt prioirty, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 21/21] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 17/21] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 03/21] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 05/21] target/arm: Support MSR access to ALLINT, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 10/21] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 15/21] hw/intc/arm_gicv3: Implement GICD_INMIR, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 16/21] hw/intc: Enable FEAT_GICv3_NMI Feature, Jinjie Ruan, 2024/02/23
- [RFC PATCH v3 04/21] target/arm: Implement ALLINT MSR (immediate), Jinjie Ruan, 2024/02/23