Re: [RFC PATCH v3 00/21] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI

[Richard Henderson]

On 2/23/24 00:32, Jinjie Ruan via wrote:
> This patch set implements FEAT_NMI and FEAT_GICv3_NMI for armv8. These
> introduce support for a new category of interrupts in the architecture
> which we can use to provide NMI like functionality.
>
> There are two modes for using this FEAT_NMI. When PSTATE.ALLINT or
> PSTATE.SP & SCTLR_ELx.SCTLR_SPINTMASK is set, any entry to ELx causes all
> interrupts including those with superpriority to be masked on entry to ELn
> until the mask is explicitly removed by software or hardware. PSTATE.ALLINT
> can be managed by software using the new register control ALLINT.ALLINT.
> Independent controls are provided for this feature at each EL, usage at EL1
> should not disrupt EL2 or EL3.
>
> I have tested it with the following linux patches which try to support
> FEAT_NMI in linux kernel:
>
>         
> https://lore.kernel.org/linux-arm-kernel/Y4sH5qX5bK9xfEBp@lpieralisi/T/#mb4ba4a2c045bf72c10c2202c1dd1b82d3240dc88
>
> In the test, SGI, PPI and SPI interrupts can all be set to have super priority
> to be converted to a hardware NMI interrupt. The SGI is tested with kernel
> IPI as NMI framework, and the PPI interrupt is tested with "perf top" command
> with hardware NMI enabled, and the PPI interrupt is tested with a custom
> test module, in which NMI interrupts can be received and transmitted normally.
>
>           +-------------------------------------------------+
>           |               Distributor                       |
>           +-------------------------------------------------+
>               SPI |  NMI                         |  NMI
>                  \ /                            \ /
>              +--------+                     +-------+
>              | Redist |                     | Redist|
>              +--------+                     +-------+
>              SGI  | NMI                     PPI | NMI
>                  \ /                           \ /
>            +-------------+             +---------------+
>            |CPU Interface|   ...       | CPU Interface |
>            +-------------+             +---------------+
>                 | NMI                         | NMI
>                \ /                           \ /
>              +-----+                       +-----+
>              |  PE |                       |  PE |
>              +-----+                       +-----+
>
> Changes in v3:
> - Remove the FIQ NMI.
> - Adjust the patches Sequence.
> - Reomve the patch "Set pstate.ALLINT in arm_cpu_reset_hold".
> - Check whether support FEAT_NMI and FEAT_GICv3 for FEAT_GICv3_NMI.
> - With CPU_INTERRUPT_NMI, both CPSR_I and ISR_IS must be set.
> - Not include NMI logic when FEAT_NMI or SCTLR_ELx.NMI not enabled.
> - Refator nmi mask in arm_excp_unmasked().
> - Add VNMI definitions, add HCRX_VINMI and HCRX_VFNMI support in HCRX_EL2.
> - Add Reviewed-by and Acked-by.
> - Update the commit message.
>
> Changes in v2:
> - Break up the patches so that each one does only one thing.
> - Remove the command line option and just implement it in "max" cpu.

Still missing all handling of virtual NMI, both within the CPU and the GIC.
This is not an optional portion of the spec.


r~