Re: [RFC PATCH v2 07/22] target/arm: Add support for NMI event state

[Richard Henderson]

On 2/22/24 01:52, Jinjie Ruan wrote:
> On 2024/2/22 5:25, Richard Henderson wrote:
> > On 2/21/24 10:10, Richard Henderson wrote:
> > > On 2/21/24 03:08, Jinjie Ruan via wrote:
> > > > The NMI exception state include whether the interrupt with super
> > > > priority
> > > > is IRQ or FIQ, so add a nmi_is_irq flag in CPUARMState to distinguish
> > > > it.
> > > >
> > > > Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> > > > ---
> > > >    target/arm/cpu.h    | 2 ++
> > > >    target/arm/helper.c | 9 +++++++++
> > > >    2 files changed, 11 insertions(+)
> > > >
> > > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> > > > index 5257343bcb..051e589e19 100644
> > > > --- a/target/arm/cpu.h
> > > > +++ b/target/arm/cpu.h
> > > > @@ -603,6 +603,8 @@ typedef struct CPUArchState {
> > > >        /* State of our input IRQ/FIQ/VIRQ/VFIQ lines */
> > > >        uint32_t irq_line_state;
> > > > +    bool nmi_is_irq;
> > >
> > > Why would you need to add this to CPUARMState?
> > > This has the appearance of requiring only a local variable.
> > > But it is hard to tell since you do not set it within this patch at all.
> >
> > According to Arm GIC section 4.6.3 Interrupt superpriority, NMI is
> > always IRQ, never FIQ, so this is never required.
>
> There is a bit of ambiguity here. The processor manual says that both
> irq and fiq can have superpriority attributes, but the gic manual only
> says that the IRQ has superpriority attributes.

Yes, it is possible to inject a superpriority FIQ via HCRX_EL2.  But you don't need an 
extra variable to handle this.


r~