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[RFC PATCH v2 13/22] hw/intc/arm_gicv3: Add external IRQ lines for NMI
From: |
Jinjie Ruan |
Subject: |
[RFC PATCH v2 13/22] hw/intc/arm_gicv3: Add external IRQ lines for NMI |
Date: |
Wed, 21 Feb 2024 13:08:14 +0000 |
Augment the GICv3's QOM device interface by adding one
new set of sysbus IRQ line, to signal NMI to each CPU.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
hw/intc/arm_gicv3_common.c | 3 +++
include/hw/intc/arm_gic_common.h | 1 +
include/hw/intc/arm_gicv3_common.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index cb55c72681..6249c3edc9 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -299,6 +299,9 @@ void gicv3_init_irqs_and_mmio(GICv3State *s,
qemu_irq_handler handler,
for (i = 0; i < s->num_cpu; i++) {
sysbus_init_irq(sbd, &s->cpu[i].parent_vfiq);
}
+ for (i = 0; i < s->num_cpu; i++) {
+ sysbus_init_irq(sbd, &s->cpu[i].parent_nmi);
+ }
memory_region_init_io(&s->iomem_dist, OBJECT(s), ops, s,
"gicv3_dist", 0x10000);
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h
index 7080375008..fc89be96d4 100644
--- a/include/hw/intc/arm_gic_common.h
+++ b/include/hw/intc/arm_gic_common.h
@@ -71,6 +71,7 @@ struct GICState {
qemu_irq parent_fiq[GIC_NCPU];
qemu_irq parent_virq[GIC_NCPU];
qemu_irq parent_vfiq[GIC_NCPU];
+ qemu_irq parent_nmi[GIC_NCPU];
qemu_irq maintenance_irq[GIC_NCPU];
/* GICD_CTLR; for a GIC with the security extensions the NS banked version
diff --git a/include/hw/intc/arm_gicv3_common.h
b/include/hw/intc/arm_gicv3_common.h
index 4e2fb518e7..1eb8c39239 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -155,6 +155,7 @@ struct GICv3CPUState {
qemu_irq parent_fiq;
qemu_irq parent_virq;
qemu_irq parent_vfiq;
+ qemu_irq parent_nmi;
/* Redistributor */
uint32_t level; /* Current IRQ level */
--
2.34.1
- Re: [RFC PATCH v2 06/22] target/arm: Add support for Non-maskable Interrupt, (continued)
- [RFC PATCH v2 16/22] hw/intc/arm_gicv3: Implement GICD_INMIR, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 09/22] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 05/22] target/arm: Support MSR access to ALLINT, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 13/22] hw/intc/arm_gicv3: Add external IRQ lines for NMI,
Jinjie Ruan <=
- [RFC PATCH v2 22/22] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update(), Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 20/22] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 14/22] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64(), Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 15/22] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 21/22] hw/intc/arm_gicv3: Implement NMI interrupt prioirty, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 12/22] hw/arm/virt: Wire NMI irq line from GIC to CPU, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 01/22] target/arm: Add FEAT_NMI to max, Jinjie Ruan, 2024/02/21