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[RFC 5/8] i386/cpu: Support thread and module level cache topology
From: |
Zhao Liu |
Subject: |
[RFC 5/8] i386/cpu: Support thread and module level cache topology |
Date: |
Tue, 20 Feb 2024 17:25:01 +0800 |
From: Zhao Liu <zhao1.liu@intel.com>
Allows cache to be defined at the thread and module level. This
increases flexibility for x86 users to customize their cache topology.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
target/i386/cpu.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 725d7e70182d..d7cb0f1e49b4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -241,9 +241,15 @@ static uint32_t max_thread_ids_for_cache(X86CPUTopoInfo
*topo_info,
uint32_t num_ids = 0;
switch (share_level) {
+ case CPU_TOPO_LEVEL_THREAD:
+ num_ids = 1;
+ break;
case CPU_TOPO_LEVEL_CORE:
num_ids = 1 << apicid_core_offset(topo_info);
break;
+ case CPU_TOPO_LEVEL_MODULE:
+ num_ids = 1 << apicid_module_offset(topo_info);
+ break;
case CPU_TOPO_LEVEL_DIE:
num_ids = 1 << apicid_die_offset(topo_info);
break;
@@ -251,10 +257,6 @@ static uint32_t max_thread_ids_for_cache(X86CPUTopoInfo
*topo_info,
num_ids = 1 << apicid_pkg_offset(topo_info);
break;
default:
- /*
- * Currently there is no use case for SMT and MODULE, so use
- * assert directly to facilitate debugging.
- */
g_assert_not_reached();
}
--
2.34.1
- Re: [RFC 4/8] hw/core: Add cache topology options in -smp, (continued)
RE: [RFC 4/8] hw/core: Add cache topology options in -smp, JeeHeng Sia, 2024/02/28
[RFC 5/8] i386/cpu: Support thread and module level cache topology,
Zhao Liu <=
[RFC 6/8] i386/cpu: Update cache topology with machine's configuration, Zhao Liu, 2024/02/20
[RFC 7/8] i386/pc: Support cache topology in -smp for PC machine, Zhao Liu, 2024/02/20
[RFC 8/8] qemu-options: Add the cache topology description of -smp, Zhao Liu, 2024/02/20
Re: [RFC 0/8] Introduce SMP Cache Topology, Philippe Mathieu-Daudé, 2024/02/20