Re: [PATCH v4] hw/char/imx_serial: Implement receive FIFO and ageing timer for imx serial.

[Peter Maydell]

On Thu, 25 Jan 2024 at 15:22, Rayhan Faizel <rayhan.faizel@gmail.com> wrote:
>
> This patch implements a 32 half word FIFO as per imx serial device
> specifications. If a non empty FIFO is below the trigger level, an ageing
> timer will tick for a duration of 8 characters. On expiry, AGTIM will be set
> triggering an interrupt. AGTIM timer resets when there is activity in
> the receive FIFO.
>
> Otherwise, RRDY is set when trigger level is
> exceeded. The receive trigger level is 8 in newer kernel versions and 1 in
> older ones.
>
> This change will break migration compatibility.
>
> [Changes in v4]
>
> - Correct handling of fifo overflow including ORE and OVRRUN flag setting.
> - Correct behaviour of empty FIFO popping.
> - Remove unnecessary RRDYEN check in can_receive.
> - In ageing timer restart function, use flag checks instead of directly
>   checking FIFO levels.
> - Further fixes to code formatting.
>
> [Changes in v3]
>
> - Caught more whitespace changes that went overlooked
> - Moved fifo and timer initialization to realize
>
> [Changes in v2]
>
> As per Peter Maydell's suggestions,
>
> - Use generic FIFO32 implementation in place of handmade impl.
> - Moved timer_init to serial init and use timer_del in reset
> - Removed stray whitespaces
> - Increment VMSTATE version
>
> Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>

Thanks for this respin -- I've applied it to target-arm.next,
so it will get into upstream git by next week.

-- PMM