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[PATCH 08/20] target/arm: Rename arm_cpu_mp_affinity
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 08/20] target/arm: Rename arm_cpu_mp_affinity |
Date: |
Thu, 18 Jan 2024 21:06:29 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Rename to arm_build_mp_affinity. This frees up the name for
other usage, and emphasizes that the cpu object is not involved.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/cpu.h | 2 +-
hw/arm/npcm7xx.c | 2 +-
hw/arm/sbsa-ref.c | 2 +-
hw/arm/virt.c | 2 +-
target/arm/cpu.c | 6 +++---
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ec276fcd57..55a19e8539 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1171,7 +1171,7 @@ void arm_cpu_post_init(Object *obj);
(ARM_AFF0_MASK | ARM_AFF1_MASK | ARM_AFF2_MASK | ARM_AFF3_MASK)
#define ARM64_AFFINITY_INVALID (~ARM64_AFFINITY_MASK)
-uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz);
+uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz);
#ifndef CONFIG_USER_ONLY
extern const VMStateDescription vmstate_arm_cpu;
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 15ff21d047..7fb0a233b2 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -474,7 +474,7 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
/* CPUs */
for (i = 0; i < nc->num_cpus; i++) {
object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity",
- arm_cpu_mp_affinity(i, NPCM7XX_MAX_NUM_CPUS),
+ arm_build_mp_affinity(i, NPCM7XX_MAX_NUM_CPUS),
&error_abort);
object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar",
NPCM7XX_GIC_CPU_IF_ADDR, &error_abort);
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 477dca0637..b8857d1e9e 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -148,7 +148,7 @@ static const int sbsa_ref_irqmap[] = {
static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
{
uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER;
- return arm_cpu_mp_affinity(idx, clustersz);
+ return arm_build_mp_affinity(idx, clustersz);
}
static void sbsa_fdt_add_gic_node(SBSAMachineState *sms)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2793121cb4..3fc144236b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1676,7 +1676,7 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState
*vms, int idx)
clustersz = GICV3_TARGETLIST_BITS;
}
}
- return arm_cpu_mp_affinity(idx, clustersz);
+ return arm_build_mp_affinity(idx, clustersz);
}
static inline bool *virt_get_high_memmap_enabled(VirtMachineState *vms,
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 826ce842c0..0bbba48faa 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1307,7 +1307,7 @@ static void arm_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
}
}
-uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)
+uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz)
{
uint32_t Aff1 = idx / clustersz;
uint32_t Aff0 = idx % clustersz;
@@ -2113,8 +2113,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
**errp)
* so these bits always RAZ.
*/
if (cpu->mp_affinity == ARM64_AFFINITY_INVALID) {
- cpu->mp_affinity = arm_cpu_mp_affinity(cs->cpu_index,
- ARM_DEFAULT_CPUS_PER_CLUSTER);
+ cpu->mp_affinity = arm_build_mp_affinity(cs->cpu_index,
+ ARM_DEFAULT_CPUS_PER_CLUSTER);
}
if (cpu->reset_hivecs) {
--
2.41.0
- [PATCH 00/20] arm: Rework target/ headers to build various hw/ files once, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 01/20] hw/arm/exynos4210: Include missing 'exec/tswap.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 02/20] hw/arm/xilinx_zynq: Include missing 'exec/tswap.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 03/20] hw/arm/smmuv3: Include missing 'hw/registerfields.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 04/20] hw/arm/xlnx-versal: Include missing 'cpu.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 05/20] target/arm/cpu-features: Include missing 'hw/registerfields.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 06/20] target/arm/cpregs: Include missing 'hw/registerfields.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 07/20] target/arm/cpregs: Include missing 'kvm-consts.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 08/20] target/arm: Rename arm_cpu_mp_affinity,
Philippe Mathieu-Daudé <=
- [PATCH 09/20] target/arm: Create arm_cpu_mp_affinity, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 10/20] target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 11/20] target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h', Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 12/20] hw/cpu/a9mpcore: Build it only once, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 13/20] hw/misc/xlnx-versal-crl: Include generic 'cpu-qom.h' instead of 'cpu.h', Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 14/20] hw/misc/xlnx-versal-crl: Build it only once, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 15/20] target/arm: Expose M-profile register bank index definitions, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 16/20] hw/arm/armv7m: Make 'hw/intc/armv7m_nvic.h' a target agnostic header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 17/20] target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header, Philippe Mathieu-Daudé, 2024/01/18
- [PATCH 18/20] target/arm: Move e2h_access() helper around, Philippe Mathieu-Daudé, 2024/01/18