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Re: [PATCH 31/35] target/arm: Mark up VNCR offsets (offsets >= 0x200, e


From: Richard Henderson
Subject: Re: [PATCH 31/35] target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC)
Date: Thu, 28 Dec 2023 11:50:33 +1100
User-agent: Mozilla Thunderbird

On 12/18/23 22:33, Peter Maydell wrote:
Mark up the cpreginfo structs to indicate offsets for system
registers from VNCR_EL2, as defined in table D8-66 in rule R_CSRPQ in
the Arm ARM.  This covers all the remaining offsets at 0x200 and
above, except for the GIC ICH_* registers.

(Note that because we don't implement FEAT_SPE, FEAT_TRF,
FEAT_MPAM, FEAT_BRBE or FEAT_AMUv1p1 we don't implement any
of the registers that use offsets at 0x800 and above.)

Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
  target/arm/helper.c | 8 ++++++++
  1 file changed, 8 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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