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Re: [PATCH v4 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT
From: |
Andrew Jones |
Subject: |
Re: [PATCH v4 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT |
Date: |
Thu, 26 Oct 2023 10:31:51 +0200 |
On Thu, Oct 26, 2023 at 01:37:09AM +0530, Sunil V L wrote:
> MMU type information is available via MMU node in RHCT. Add this node in
> RHCT.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> hw/riscv/virt-acpi-build.c | 37 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 36 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index ebe7062b9b..dc7c0213f5 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -159,6 +159,8 @@ static void build_rhct(GArray *table_data,
> size_t len, aligned_len;
> uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0;
> RISCVCPU *cpu = &s->soc[0].harts[0];
> + uint32_t mmu_offset = 0;
> + uint8_t satp_mode_max;
> char *isa;
>
> AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
> @@ -178,6 +180,10 @@ static void build_rhct(GArray *table_data,
> num_rhct_nodes++;
> }
>
> + if (cpu->cfg.satp_mode.supported != 0) {
> + num_rhct_nodes++;
> + }
> +
> /* Number of RHCT nodes*/
> build_append_int_noprefix(table_data, num_rhct_nodes, 4);
>
> @@ -233,6 +239,26 @@ static void build_rhct(GArray *table_data,
> }
> }
>
> + /* MMU node structure */
> + if (cpu->cfg.satp_mode.supported != 0) {
> + satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map);
> + mmu_offset = table_data->len - table.table_offset;
> + build_append_int_noprefix(table_data, 2, 2); /* Type */
> + build_append_int_noprefix(table_data, 8, 2); /* Length */
> + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> + build_append_int_noprefix(table_data, 0, 1); /* Reserved */
> + /* MMU Type */
> + if (satp_mode_max == VM_1_10_SV57) {
> + build_append_int_noprefix(table_data, 2, 1); /* Sv57 */
> + } else if (satp_mode_max == VM_1_10_SV48) {
> + build_append_int_noprefix(table_data, 1, 1); /* Sv48 */
> + } else if (satp_mode_max == VM_1_10_SV39) {
> + build_append_int_noprefix(table_data, 0, 1); /* Sv39 */
> + } else {
> + assert(1);
> + }
> + }
> +
> /* Hart Info Node */
> for (int i = 0; i < arch_ids->len; i++) {
> len = 16;
> @@ -245,17 +271,26 @@ static void build_rhct(GArray *table_data,
> num_offsets++;
> }
>
> + if (mmu_offset) {
> + len += 4;
> + num_offsets++;
> + }
> +
> build_append_int_noprefix(table_data, len, 2);
> build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> /* Number of offsets */
> build_append_int_noprefix(table_data, num_offsets, 2);
> build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID
> */
> -
> /* Offsets */
> build_append_int_noprefix(table_data, isa_offset, 4);
> + if (mmu_offset) {
> + build_append_int_noprefix(table_data, mmu_offset, 4);
> + }
> +
In the previous version of this patch the MMU node was getting generated
above the CMO node, so its offset was less than those of the CMO node,
and why I recommended moving it up here. But, in this version, the MMU
node is now getting generated after the CMO node, so moving this up
means the offsets are still not in ascending order.
> if (cmo_offset) {
> build_append_int_noprefix(table_data, cmo_offset, 4);
> }
> +
> }
>
> acpi_table_end(linker, &table);
> --
> 2.39.2
>
>
Anyway,
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks,
drew
- [PATCH v4 03/13] hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT, (continued)
- [PATCH v4 03/13] hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT, Sunil V L, 2023/10/25
- [PATCH v4 04/13] hw/riscv: virt: Make few IMSIC macros and functions public, Sunil V L, 2023/10/25
- [PATCH v4 05/13] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC, Sunil V L, 2023/10/25
- [PATCH v4 06/13] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT, Sunil V L, 2023/10/25
- [PATCH v4 07/13] hw/riscv/virt-acpi-build.c: Add APLIC in the MADT, Sunil V L, 2023/10/25
- [PATCH v4 08/13] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT, Sunil V L, 2023/10/25
- [PATCH v4 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT, Sunil V L, 2023/10/25
- Re: [PATCH v4 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT,
Andrew Jones <=
- [PATCH v4 10/13] hw/pci-host/gpex: Define properties for MMIO ranges, Sunil V L, 2023/10/25
- [PATCH v4 11/13] hw/riscv/virt: Update GPEX MMIO related properties, Sunil V L, 2023/10/25
- [PATCH v4 13/13] hw/riscv/virt-acpi-build.c: Add PLIC in MADT, Sunil V L, 2023/10/25
- [PATCH v4 12/13] hw/riscv/virt-acpi-build.c: Add IO controllers and devices, Sunil V L, 2023/10/25