qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 0/2] target/arm: Implement Neoverse-N2


From: Peter Maydell
Subject: Re: [PATCH 0/2] target/arm: Implement Neoverse-N2
Date: Tue, 17 Oct 2023 13:40:11 +0100

Ping for code review -- Richard or Alex, maybe ?

thanks
-- PMM

On Fri, 15 Sept 2023 at 19:54, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> This patchset implements a model of the Neoverse-N2 CPU.
> Because it's very similar to the Cortex-A710 we don't
> need to implement any new features for it; but because it
> supports 48 bit physical addresses we can use it in the
> sbsa-ref board.
>
> Patch 1 fixes a few minor errors in the A710 definition
> that I spotted while I was cross-checking it against the
> N2 TRM to see what had changed.
>
> Patch 2 is the new CPU model.
>
> thanks
> -- PMM
>
> Peter Maydell (2):
>   target/arm: Correct minor errors in Cortex-A710 definition
>   target/arm: Implement Neoverse N2 CPU model
>
>  docs/system/arm/virt.rst |   1 +
>  hw/arm/sbsa-ref.c        |   1 +
>  hw/arm/virt.c            |   1 +
>  target/arm/tcg/cpu64.c   | 114 ++++++++++++++++++++++++++++++++++++++-
>  4 files changed, 115 insertions(+), 2 deletions(-)



reply via email to

[Prev in Thread] Current Thread [Next in Thread]