Re: [PATCH] target/arm: Allow only specific instructions based on the SCTLR_EL1.UCI bit

[Peter Maydell]

On Thu, 20 Jan 2022 at 12:00, Idan Horowitz <idan.horowitz@gmail.com> wrote:
>
> On Thu, 20 Jan 2022 at 13:42, Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> >
> > But for all of these instructions the reginfo struct
> > sets ".access = PL1_W". The .access field is always
> > checked before the .accessfn, so for any of these instructions
> > executed from EL0 I think we will always fail the .access
> > check and UNDEF the insn without calling the .accessfn.
> > So it doesn't matter that the .accessfn has "if EL0 then
> > check SCTLR_EL1.UCI", because when running the accessfn
> > for these insns we can never be in EL0.
> >
> > Am I missing something?
> >
>
> Hey, you are not missing anything, this patch indeed does not change
> any external behaviour.
> I should have specified, but the point of this patch is optimization:
> during benchmarking of the various AArch64 instructions I found that
> the cache flush instructions were quite slow, simply due to their
> heavy access functions, so this is an attempt at simplifying them.

But the code you are effectively removing is never executed
for the instructions where you're changing the access function.
If you're proposing this as a performance improvement, can
you provide before-and-after benchmarks demonstrating that
improvement ?

thanks
-- PMM