Re: [PATCH] hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bit

[Peter Maydell]

On Thu, 25 Nov 2021 at 15:47, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Wed, 24 Nov 2021 at 18:22, Shashi Mallela <shashi.mallela@linaro.org> 
> wrote:
> >
> > When Enabled bit is cleared in GITS_CTLR,ITS feature continues
> > to be enabled.This patch fixes the issue.
> >
> > Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
> > ---
> >  hw/intc/arm_gicv3_its.c | 7 ++++---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
> > index 84bcbb5f56..c929a9cb5c 100644
> > --- a/hw/intc/arm_gicv3_its.c
> > +++ b/hw/intc/arm_gicv3_its.c
> > @@ -896,13 +896,14 @@ static bool its_writel(GICv3ITSState *s, hwaddr 
> > offset,
> >
> >      switch (offset) {
> >      case GITS_CTLR:
> > -        s->ctlr |= (value & ~(s->ctlr));
> > -
> > -        if (s->ctlr & ITS_CTLR_ENABLED) {
> > +        if (value & R_GITS_CTLR_ENABLED_MASK) {
> > +            s->ctlr |= ITS_CTLR_ENABLED;
> >              extract_table_params(s);
> >              extract_cmdq_params(s);
> >              s->creadr = 0;
> >              process_cmdq(s);
> > +        } else {
> > +            s->ctlr &= ~ITS_CTLR_ENABLED;
> >          }
> >          break;
> >      case GITS_CBASER:
>
> The code looks fine, so in that sense
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>
> It seems odd that we have two different #defines for the
> same bit, though (ITS_CTLR_ENABLED and R_GITS_CTLR_ENABLED_MASK).
> We should probably standardize on the latter and drop the
> former.

Applied this version to target-arm.next for 6.2, anyway.

-- PMM