[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: DSB does not seem to wait for TLBI completion
From: |
Idan Horowitz |
Subject: |
Re: DSB does not seem to wait for TLBI completion |
Date: |
Sun, 21 Nov 2021 09:52:06 +0200 |
Alex Bennée <alex.bennee@linaro.org> wrote:
> If we exit the translation block like the code for ISB does then that
> will give a chance for all the queued work to complete. If we have done
> a _synced call this includes bringing all vCPUs to a halt before
> flushing and restarting.
>
> Try:
>
> modified target/arm/translate-a64.c
> @@ -1553,6 +1553,7 @@ static void handle_sync(DisasContext *s, uint32_t insn,
> break;
> }
> tcg_gen_mb(bar);
> + gen_goto_tb(s, 0, s->base.pc_next);
> return;
> case 6: /* ISB */
>
> and see if that helps. I suspect do be efficient we should probably do
> some more decode on the instruction to make that decision as ending a
> block for every DMB/DSB might be overkill and impact performance.
>
> I don't think we have a way to track pending state awaiting a DSB
> instruction in the translator but in theory we could. I thought
> (ri->type & ARM_CP_IO) for system registers would ensure an end of block
> but apparently that is only for icount.
>
I am actually running in icount mode (-icount shift=10 specifically),
and adding the translation block exit or just using ISB directly does
not seem to affect it unfortunately.
> --
> Alex Bennée
Idan Horowitz