qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 3/7] hw/adc: Fix CONV bit in NPCM7XX ADC CON register


From: Peter Maydell
Subject: Re: [PATCH v2 3/7] hw/adc: Fix CONV bit in NPCM7XX ADC CON register
Date: Mon, 1 Nov 2021 17:35:38 +0000

On Thu, 21 Oct 2021 at 19:40, Hao Wu <wuhaotsh@google.com> wrote:
>
> The correct bit for the CONV bit in NPCM7XX ADC is bit 13. This patch
> fixes that in the module, and also lower the IRQ when the guest
> is done handling an interrupt event from the ADC module.
>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> Reviewed-by: Patrick Venture<venture@google.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



reply via email to

[Prev in Thread] Current Thread [Next in Thread]