Re: [PATCH v4 1/9] hw/pci-host/i440fx: Inline sysbus_add_io()

[Bernhard Beschow]

Am 22. Februar 2023 18:05:51 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>
>
>Am 22. Februar 2023 10:58:08 UTC schrieb "Philippe Mathieu-Daudé" 
><philmd@linaro.org>:
>>On 13/2/23 17:19, Bernhard Beschow wrote:
>>> sysbus_add_io() just wraps memory_region_add_subregion() while also
>>> obscuring where the memory is attached. So use
>>> memory_region_add_subregion() directly and attach it to the existing
>>> memory region s->bus->address_space_io which is set as an alias to
>>> get_system_io() by the pc machine.
>>> 
>>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>>> ---
>>>   hw/pci-host/i440fx.c | 5 +++--
>>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>> 
>>> diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
>>> index 262f82c303..9c6882d3fc 100644
>>> --- a/hw/pci-host/i440fx.c
>>> +++ b/hw/pci-host/i440fx.c
>>> @@ -27,6 +27,7 @@
>>>   #include "qemu/range.h"
>>>   #include "hw/i386/pc.h"
>>>   #include "hw/pci/pci.h"
>>> +#include "hw/pci/pci_bus.h"
>>>   #include "hw/pci/pci_host.h"
>>>   #include "hw/pci-host/i440fx.h"
>>>   #include "hw/qdev-properties.h"
>>> @@ -217,10 +218,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, 
>>> Error **errp)
>>>       PCIHostState *s = PCI_HOST_BRIDGE(dev);
>>>       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>>>   -    sysbus_add_io(sbd, 0xcf8, &s->conf_mem);
>>> +    memory_region_add_subregion(s->bus->address_space_io, 0xcf8, 
>>> &s->conf_mem);
>>
>>To avoid accessing internal fields we should stick to the PCI API:
>>
>>    memory_region_add_subregion(pci_address_space_io(PCI_DEVICE(dev)),
>>                                0xcf8, &s->conf_mem);
>
>dev is of type PCIHostState which derives from SysBusDevice, not PCIDevice. 
>AFAICS there is no getter implemented on PCIBus.

Ping

>
>>
>>>       sysbus_init_ioports(sbd, 0xcf8, 4);
>>>   -    sysbus_add_io(sbd, 0xcfc, &s->data_mem);
>>> +    memory_region_add_subregion(s->bus->address_space_io, 0xcfc, 
>>> &s->data_mem);
>>>       sysbus_init_ioports(sbd, 0xcfc, 4);
>>
>>Now all classes implementing PCI_HOST_BRIDGE register conf/data in I/O
>>space, so this could be a pattern justifying reworking a bit the
>>PCIHostBridgeClass or adding an helper in "hw/pci/pci_host.h" to do
>>that generically.
>
>What do you mean exactly? There are PCI hosts spawning two PCI buses and 
>therefore have two such spaces.
>
>Best regards,
>Bernhard