[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Stable-9.1.2 38/58] target/ppc: Make divd[u] handler method decodetree
From: |
Michael Tokarev |
Subject: |
[Stable-9.1.2 38/58] target/ppc: Make divd[u] handler method decodetree compatible |
Date: |
Sat, 9 Nov 2024 15:08:39 +0300 |
From: Ilya Leoshkevich <iii@linux.ibm.com>
This is like commit 86e6202a57b1 ("target/ppc: Make divw[u] handler
method decodetree compatible."), but for gen_op_arith_divd().
Cc: qemu-stable@nongnu.org
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
(cherry picked from commit 7b4820a3e1dfba2b81f2354e7c748fc04b275dba)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 02c810e884..5a352cdad1 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1823,7 +1823,7 @@ static inline void gen_op_arith_divd(DisasContext *ctx,
TCGv ret,
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
}
- if (unlikely(Rc(ctx->opcode) != 0)) {
+ if (unlikely(compute_rc0)) {
gen_set_Rc0(ctx, ret);
}
}
--
2.39.5
- [Stable-9.1.2 35/58] target/riscv/kvm: clarify how 'riscv-aia' default works, (continued)
- [Stable-9.1.2 35/58] target/riscv/kvm: clarify how 'riscv-aia' default works, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 25/58] hw/sd/omap_mmc: Don't use sd_cmd_type_t, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 26/58] target/arm: Fix arithmetic underflow in SETM instruction, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 27/58] target/arm: Store FPSR cumulative exception bits in env->vfp.fpsr, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 28/58] stubs: avoid duplicate symbols in libqemuutil.a, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 36/58] target/riscv: Fix vcompress with rvv_ta_all_1s, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 37/58] target/ppc: Set ctx->opcode for decode_insn32(), Michael Tokarev, 2024/11/09
- [Stable-9.1.2 29/58] target/riscv/csr.c: Fix an access to VXSAT, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 32/58] target/riscv: Set vtype.vill on CPU reset, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 34/58] target/riscv/kvm: set 'aia_mode' to default in error path, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 38/58] target/ppc: Make divd[u] handler method decodetree compatible,
Michael Tokarev <=
- [Stable-9.1.2 40/58] ppc/pnv: Fix LPC POWER8 register sanity check, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 42/58] target/ppc: Fix HFSCR facility checks, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 43/58] ppc/pnv: ADU fix possible buffer overrun with invalid size, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 39/58] ppc/pnv: Fix LPC serirq routing calculation, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 44/58] hw/ssi/pnv_spi: Match _xfer_buffer_free() with _xfer_buffer_new(), Michael Tokarev, 2024/11/09
- [Stable-9.1.2 41/58] target/ppc: Fix mtDPDES targeting SMT siblings, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 47/58] tests/tcg: Replace -mpower8-vector with -mcpu=power8, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 46/58] hw/ssi/pnv_spi: Fixes Coverity CID 1558831, Michael Tokarev, 2024/11/09
- [Stable-9.1.2 45/58] hw/ssi/pnv_spi: Return early in transfer(), Michael Tokarev, 2024/11/09
- [Stable-9.1.2 52/58] Revert "target/arm: Fix usage of MMU indexes when EL3 is AArch32", Michael Tokarev, 2024/11/09