Re: [PATCH 03/13] target/arm: Fix FJCVTZS vs flush-to-zero

[Peter Maydell]

On Tue, 25 Jun 2024 at 06:09, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Input denormals cause the Javascript inexact bit
> (output to Z) to be set.
>
> Cc: qemu-stable@nongnu.org
> Fixes: 6c1f6f2733a ("target/arm: Implement ARMv8.3-JSConv")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2375
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---

> --- /dev/null
> +++ b/tests/tcg/aarch64/test-2375.c
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/* See https://gitlab.com/qemu-project/qemu/-/issues/2375 */

Not a project requirement, I guess, but on the Linaro end I
think we want a
 /* Copyright (c) 2024 Linaro Ltd */

too.

> +
> +#include <assert.h>
> +
> +int main()

Missing "void".

> +{
> +   int r, z;
> +
> +   asm("msr fpcr, %2\n\t"
> +       "fjcvtzs %w0, %d3\n\t"
> +       "cset %1, eq"
> +       : "=r"(r), "=r"(z)
> +       : "r"(0x01000000L),     /* FZ = 1 */
> +         "w"(0xfcff00L));       /* denormal */
> +
> +    assert(r == 0);
> +    assert(z == 0);
> +    return 0;
> +}

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

(If these are the only issues in the patchset I'll fix them
up when I apply it.)

thanks
-- PMM