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[PATCH v4 25/54] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
From: |
Richard Henderson |
Subject: |
[PATCH v4 25/54] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st} |
Date: |
Wed, 3 May 2023 07:57:00 +0100 |
We need to set this in TCGLabelQemuLdst, so plumb this
all the way through from tcg_out_op.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index b399798664..e931f0cde4 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1770,13 +1770,14 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg
addr_reg, MemOp opc,
}
static void add_qemu_ldst_label(TCGContext *s, bool is_ld, MemOpIdx oi,
- TCGReg data, TCGReg addr,
+ TCGType type, TCGReg data, TCGReg addr,
tcg_insn_unit *raddr, tcg_insn_unit *label_ptr)
{
TCGLabelQemuLdst *label = new_ldst_label(s);
label->is_ld = is_ld;
label->oi = oi;
+ label->type = type;
label->datalo_reg = data;
label->addrlo_reg = addr;
label->raddr = tcg_splitwx_to_rx(raddr);
@@ -1900,7 +1901,7 @@ static void tcg_prepare_user_ldst(TCGContext *s, TCGReg
*addr_reg,
#endif /* CONFIG_SOFTMMU */
static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
- MemOpIdx oi)
+ MemOpIdx oi, TCGType data_type)
{
MemOp opc = get_memop(oi);
#ifdef CONFIG_SOFTMMU
@@ -1916,7 +1917,8 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg
data_reg, TCGReg addr_reg,
tcg_out_qemu_ld_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
- add_qemu_ldst_label(s, 1, oi, data_reg, addr_reg, s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, true, oi, data_type, data_reg, addr_reg,
+ s->code_ptr, label_ptr);
#else
TCGReg index_reg;
tcg_target_long disp;
@@ -1931,7 +1933,7 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg
data_reg, TCGReg addr_reg,
}
static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
- MemOpIdx oi)
+ MemOpIdx oi, TCGType data_type)
{
MemOp opc = get_memop(oi);
#ifdef CONFIG_SOFTMMU
@@ -1947,7 +1949,8 @@ static void tcg_out_qemu_st(TCGContext* s, TCGReg
data_reg, TCGReg addr_reg,
tcg_out_qemu_st_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
- add_qemu_ldst_label(s, 0, oi, data_reg, addr_reg, s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, false, oi, data_type, data_reg, addr_reg,
+ s->code_ptr, label_ptr);
#else
TCGReg index_reg;
tcg_target_long disp;
@@ -2307,13 +2310,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
break;
case INDEX_op_qemu_ld_i32:
- /* ??? Technically we can use a non-extending instruction. */
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], TCG_TYPE_I32);
+ break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args[0], args[1], args[2]);
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], TCG_TYPE_I64);
break;
case INDEX_op_qemu_st_i32:
+ tcg_out_qemu_st(s, args[0], args[1], args[2], TCG_TYPE_I32);
+ break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args[0], args[1], args[2]);
+ tcg_out_qemu_st(s, args[0], args[1], args[2], TCG_TYPE_I64);
break;
case INDEX_op_ld16s_i64:
--
2.34.1
- [PATCH v4 14/54] tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld, st}, (continued)
- [PATCH v4 14/54] tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld, st}, Richard Henderson, 2023/05/03
- [PATCH v4 16/54] tcg/loongarch64: Introduce prepare_host_addr, Richard Henderson, 2023/05/03
- [PATCH v4 15/54] tcg/loongarch64: Introduce HostAddress, Richard Henderson, 2023/05/03
- [PATCH v4 17/54] tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/05/03
- [PATCH v4 18/54] tcg/mips: Introduce prepare_host_addr, Richard Henderson, 2023/05/03
- [PATCH v4 21/54] tcg/ppc: Introduce prepare_host_addr, Richard Henderson, 2023/05/03
- [PATCH v4 19/54] tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/05/03
- [PATCH v4 20/54] tcg/ppc: Introduce HostAddress, Richard Henderson, 2023/05/03
- [PATCH v4 22/54] tcg/riscv: Require TCG_TARGET_REG_BITS == 64, Richard Henderson, 2023/05/03
- [PATCH v4 23/54] tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/05/03
- [PATCH v4 25/54] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st},
Richard Henderson <=
- [PATCH v4 26/54] tcg/s390x: Introduce HostAddress, Richard Henderson, 2023/05/03
- [PATCH v4 27/54] tcg/s390x: Introduce prepare_host_addr, Richard Henderson, 2023/05/03
- [PATCH v4 28/54] tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return, Richard Henderson, 2023/05/03
- [PATCH v4 34/54] tcg: Add routines for calling slow-path helpers, Richard Henderson, 2023/05/03
- [PATCH v4 24/54] tcg/riscv: Introduce prepare_host_addr, Richard Henderson, 2023/05/03
- [PATCH v4 29/54] tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/05/03
- [PATCH v4 30/54] tcg: Move TCGLabelQemuLdst to tcg.c, Richard Henderson, 2023/05/03
- [PATCH v4 37/54] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/03
- [PATCH v4 31/54] tcg: Replace REG_P with arg_loc_reg_p, Richard Henderson, 2023/05/03
- [PATCH v4 33/54] tcg: Widen helper_*_st[bw]_mmu val arguments, Richard Henderson, 2023/05/03