Re: [RFC PATCH 4/5] tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements

[Miroslav Rezanina]

----- Original Message -----
> From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
> To: qemu-devel@nongnu.org
> Cc: "Huacai Chen" <chenhuacai@kernel.org>, "Aurelien Jarno" 
> <aurelien@aurel32.net>, "Aleksandar Rikalo"
> <aleksandar.rikalo@syrmia.com>, "Thomas Huth" <thuth@redhat.com>, "Stefan 
> Weil" <sw@weilnetz.de>,
> qemu-riscv@nongnu.org, qemu-arm@nongnu.org, "Jiaxun Yang" 
> <jiaxun.yang@flygoat.com>, qemu-s390x@nongnu.org,
> "Philippe Mathieu-Daudé" <f4bug@amsat.org>, "Cornelia Huck" 
> <cohuck@redhat.com>, "Richard Henderson"
> <richard.henderson@linaro.org>, "Andrzej Zaborowski" <balrogg@gmail.com>, 
> "Alistair Francis"
> <Alistair.Francis@wdc.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Miroslav 
> Rezanina" <mrezanin@redhat.com>
> Sent: Monday, January 11, 2021 4:01:13 PM
> Subject: [RFC PATCH 4/5] tcg: Restrict tcg_out_op() to arrays of 
> TCG_MAX_OP_ARGS elements
> 
> tcg_reg_alloc_op() allocates arrays of TCG_MAX_OP_ARGS elements.
> 
> The Aarch64 target already does this since commit 8d8db193f25
> ("tcg-aarch64: Hoist common argument loads in tcg_out_op"),
> SPARC since commit b357f902bff ("tcg-sparc: Hoist common argument
> loads in tcg_out_op").
> 
> RISCV missed it upon introduction in commit bdf503819ee
> ("tcg/riscv: Add the out op decoder"), MIPS since commit
> 22ee3a987d5 ("tcg-mips: Hoist args loads") and i386 since
> commit 42d5b514928 ("tcg/i386: Hoist common arguments in
> tcg_out_op").
> 
> Provide this information as a hint to the compiler in the function
> prototype, and update the funtion definitions.
> 
> This fixes this warning (using GCC 11):
> 
>     tcg/aarch64/tcg-target.c.inc:1855:37: error: argument 3 of type 'const
>     TCGArg[16]' {aka 'const long unsigned int[16]'} with mismatched bound
>     [-Werror=array-parameter=]
>     tcg/aarch64/tcg-target.c.inc:1856:34: error: argument 4 of type 'const
>     int[16]' with mismatched bound [-Werror=array-parameter=]
> 
> Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> RFC because such compiler hint is somehow "new" to me.
> 
> Also I expect this to be superseeded by Richard 'tcg constant'
> branch mentioned here:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg771401.html
> ---
>  tcg/tcg.c                  | 5 +++--
>  tcg/i386/tcg-target.c.inc  | 3 ++-
>  tcg/mips/tcg-target.c.inc  | 3 ++-
>  tcg/riscv/tcg-target.c.inc | 3 ++-
>  tcg/tci/tcg-target.c.inc   | 5 +++--
>  5 files changed, 12 insertions(+), 7 deletions(-)
> 
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index 472bf1755bf..97d074d8fab 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -110,8 +110,9 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
> TCGReg ret, TCGReg arg1,
>  static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg
>  arg);
>  static void tcg_out_movi(TCGContext *s, TCGType type,
>                           TCGReg ret, tcg_target_long arg);
> -static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> -                       const int *const_args);
> +static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> +                       const TCGArg args[TCG_MAX_OP_ARGS],
> +                       const int const_args[TCG_MAX_OP_ARGS]);
>  #if TCG_TARGET_MAYBE_vec
>  static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
>                              TCGReg dst, TCGReg src);
> diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
> index 46e856f4421..d121dca8789 100644
> --- a/tcg/i386/tcg-target.c.inc
> +++ b/tcg/i386/tcg-target.c.inc
> @@ -2215,7 +2215,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
> *args, bool is64)
>  }
>  
>  static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
> -                              const TCGArg *args, const int *const_args)
> +                              const TCGArg args[TCG_MAX_OP_ARGS],
> +                              const int const_args[TCG_MAX_OP_ARGS])
>  {
>      TCGArg a0, a1, a2;
>      int c, const_a2, vexop, rexw = 0;
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index add157f6c32..b9bb54f0ecc 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1691,7 +1691,8 @@ static void tcg_out_clz(TCGContext *s, MIPSInsn opcv2,
> MIPSInsn opcv6,
>  }
>  
>  static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
> -                              const TCGArg *args, const int *const_args)
> +                              const TCGArg args[TCG_MAX_OP_ARGS],
> +                              const int const_args[TCG_MAX_OP_ARGS])
>  {
>      MIPSInsn i1, i2;
>      TCGArg a0, a1, a2;
> diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
> index c60b91ba58f..5bf0d069532 100644
> --- a/tcg/riscv/tcg-target.c.inc
> +++ b/tcg/riscv/tcg-target.c.inc
> @@ -1238,7 +1238,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
> *args, bool is_64)
>  static const tcg_insn_unit *tb_ret_addr;
>  
>  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> -                       const TCGArg *args, const int *const_args)
> +                       const TCGArg args[TCG_MAX_OP_ARGS],
> +                       const int const_args[TCG_MAX_OP_ARGS])
>  {
>      TCGArg a0 = args[0];
>      TCGArg a1 = args[1];
> diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
> index d5a4d9d37cf..60464524f3d 100644
> --- a/tcg/tci/tcg-target.c.inc
> +++ b/tcg/tci/tcg-target.c.inc
> @@ -553,8 +553,9 @@ static inline void tcg_out_call(TCGContext *s, const
> tcg_insn_unit *arg)
>      old_code_ptr[1] = s->code_ptr - old_code_ptr;
>  }
>  
> -static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> -                       const int *const_args)
> +static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> +                       const TCGArg args[TCG_MAX_OP_ARGS],
> +                       const int const_args[TCG_MAX_OP_ARGS])
>  {
>      uint8_t *old_code_ptr = s->code_ptr;
>  
> --
> 2.26.2
> 
>

Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com> 

-- 
Miroslav Rezanina
Software Engineer - Virtualization Team Maintainer