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[PATCH v2 4/9] s390x/tcg: Implement MULTIPLY (MG, MGRK)
From: |
David Hildenbrand |
Subject: |
[PATCH v2 4/9] s390x/tcg: Implement MULTIPLY (MG, MGRK) |
Date: |
Mon, 28 Sep 2020 14:27:12 +0200 |
Multiply two signed 64bit values and store the 128bit result in r1 (0-63)
and r1 + 1 (64-127).
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 13 +++++++++++++
2 files changed, 15 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index e851e9df5e..2b4ad1530d 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -650,8 +650,10 @@
/* MULTIPLY */
C(0x1c00, MR, RR_a, Z, r1p1_32s, r2_32s, new, r1_D32, mul, 0)
+ C(0xb9ec, MGRK, RRF_a, MIE2,r3_o, r2_o, r1_P, 0, muls128, 0)
C(0x5c00, M, RX_a, Z, r1p1_32s, m2_32s, new, r1_D32, mul, 0)
C(0xe35c, MFY, RXY_a, GIE, r1p1_32s, m2_32s, new, r1_D32, mul, 0)
+ C(0xe384, MG, RXY_a, MIE2,r1p1_o, m2_64, r1_P, 0, muls128, 0)
F(0xb317, MEEBR, RRE, Z, e1, e2, new, e1, meeb, 0, IF_BFP)
F(0xb31c, MDBR, RRE, Z, f1, f2, new, f1, mdb, 0, IF_BFP)
F(0xb34c, MXBR, RRE, Z, x2h, x2l, x1, x1, mxb, 0, IF_BFP)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 3b433caf46..f20ebd7c6a 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3518,6 +3518,12 @@ static DisasJumpType op_mul128(DisasContext *s, DisasOps
*o)
return DISAS_NEXT;
}
+static DisasJumpType op_muls128(DisasContext *s, DisasOps *o)
+{
+ tcg_gen_muls2_i64(o->out2, o->out, o->in1, o->in2);
+ return DISAS_NEXT;
+}
+
static DisasJumpType op_meeb(DisasContext *s, DisasOps *o)
{
gen_helper_meeb(o->out, cpu_env, o->in1, o->in2);
@@ -5542,6 +5548,13 @@ static void in1_r1p1(DisasContext *s, DisasOps *o)
}
#define SPEC_in1_r1p1 SPEC_r1_even
+static void in1_r1p1_o(DisasContext *s, DisasOps *o)
+{
+ o->in1 = regs[get_field(s, r1) + 1];
+ o->g_in1 = true;
+}
+#define SPEC_in1_r1p1_o SPEC_r1_even
+
static void in1_r1p1_32s(DisasContext *s, DisasOps *o)
{
o->in1 = tcg_temp_new_i64();
--
2.26.2
- [PATCH v2 0/9] s390x/tcg: Implement some z14 facilities, David Hildenbrand, 2020/09/28
- [PATCH v2 1/9] s390x/cpu_model: S390_FEAT_MISC_INSTRUCTION_EXT -> S390_FEAT_MISC_INSTRUCTION_EXT2, David Hildenbrand, 2020/09/28
- [PATCH v2 2/9] s390x/tcg: Implement ADD HALFWORD (AGH), David Hildenbrand, 2020/09/28
- [PATCH v2 4/9] s390x/tcg: Implement MULTIPLY (MG, MGRK),
David Hildenbrand <=
- [PATCH v2 3/9] s390x/tcg: Implement SUBTRACT HALFWORD (SGH), David Hildenbrand, 2020/09/28
- [PATCH v2 5/9] s390x/tcg: Implement MULTIPLY HALFWORD (MGH), David Hildenbrand, 2020/09/28
- [PATCH v2 6/9] s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC), David Hildenbrand, 2020/09/28
- [PATCH v2 7/9] s390x/tcg: Implement MULTIPLY SINGLE (MSC, MSGC, MSGRKC, MSRKC), David Hildenbrand, 2020/09/28
- [PATCH v2 8/9] s390x/tcg: We support Miscellaneous-Instruction-Extensions Facility 2, David Hildenbrand, 2020/09/28
- [PATCH v2 9/9] s390x/tcg: Implement CIPHER MESSAGE WITH AUTHENTICATION (KMA), David Hildenbrand, 2020/09/28
- Re: [PATCH v2 0/9] s390x/tcg: Implement some z14 facilities, no-reply, 2020/09/28