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[qemu-s390x] [PULL 45/54] s390x/tcg: Implement VECTOR TEST UNDER MASK
From: |
Cornelia Huck |
Subject: |
[qemu-s390x] [PULL 45/54] s390x/tcg: Implement VECTOR TEST UNDER MASK |
Date: |
Mon, 20 May 2019 19:02:53 +0200 |
From: David Hildenbrand <address@hidden>
Let's return the cc value directly via cpu_env. Unfortunately there
isn't a simple way to calculate the value lazily - one would have to
calculate and store e.g. the population count of the mask and the
result so it can be evaluated in a cc helper.
But as VTM only sets the cc, we can assume the value will be needed soon
either way.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 11 +++++++++++
target/s390x/vec_int_helper.c | 31 +++++++++++++++++++++++++++++++
4 files changed, 45 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 2cb1f369bd86..7755a96c3371 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -209,6 +209,7 @@ DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr,
cptr, i64, i32)
DEF_HELPER_FLAGS_4(gvec_vsrl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32)
DEF_HELPER_FLAGS_4(gvec_vscbi8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vscbi16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
+DEF_HELPER_4(gvec_vtm, void, ptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index a52db413880e..e61475bdc483 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1188,6 +1188,8 @@
F(0xe767, VSUMQ, VRR_c, V, 0, 0, 0, 0, vsumq, 0, IF_VEC)
/* VECTOR SUM ACROSS WORD */
F(0xe764, VSUM, VRR_c, V, 0, 0, 0, 0, vsum, 0, IF_VEC)
+/* VECTOR TEST UNDER MASK */
+ F(0xe7d8, VTM, VRR_a, V, 0, 0, 0, 0, vtm, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 52ab8562e638..7e0bfcb1907c 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -191,6 +191,9 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t
reg, TCGv_i64 enr,
#define gen_gvec_2i_ool(v1, v2, c, data, fn) \
tcg_gen_gvec_2i_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
c, 16, 16, data, fn)
+#define gen_gvec_2_ptr(v1, v2, ptr, data, fn) \
+ tcg_gen_gvec_2_ptr(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
+ ptr, 16, 16, data, fn)
#define gen_gvec_3(v1, v2, v3, gen) \
tcg_gen_gvec_3(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
vec_full_reg_offset(v3), 16, 16, gen)
@@ -2342,3 +2345,11 @@ static DisasJumpType op_vsum(DisasContext *s, DisasOps
*o)
tcg_temp_free_i32(tmp);
return DISAS_NEXT;
}
+
+static DisasJumpType op_vtm(DisasContext *s, DisasOps *o)
+{
+ gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
+ cpu_env, 0, gen_helper_gvec_vtm);
+ set_cc_static(s);
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c
index 09137dab996f..68eaae407b47 100644
--- a/target/s390x/vec_int_helper.c
+++ b/target/s390x/vec_int_helper.c
@@ -28,6 +28,19 @@ static void s390_vec_xor(S390Vector *res, const S390Vector
*a,
res->doubleword[1] = a->doubleword[1] ^ b->doubleword[1];
}
+static void s390_vec_and(S390Vector *res, const S390Vector *a,
+ const S390Vector *b)
+{
+ res->doubleword[0] = a->doubleword[0] & b->doubleword[0];
+ res->doubleword[1] = a->doubleword[1] & b->doubleword[1];
+}
+
+static bool s390_vec_equal(const S390Vector *a, const S390Vector *b)
+{
+ return a->doubleword[0] == b->doubleword[0] &&
+ a->doubleword[1] == b->doubleword[1];
+}
+
static void s390_vec_shl(S390Vector *d, const S390Vector *a, uint64_t count)
{
uint64_t tmp;
@@ -583,3 +596,21 @@ void HELPER(gvec_vscbi##BITS)(void *v1, const void *v2,
const void *v3, \
}
DEF_VSCBI(8)
DEF_VSCBI(16)
+
+void HELPER(gvec_vtm)(void *v1, const void *v2, CPUS390XState *env,
+ uint32_t desc)
+{
+ S390Vector tmp;
+
+ s390_vec_and(&tmp, v1, v2);
+ if (s390_vec_is_zero(&tmp)) {
+ /* Selected bits all zeros; or all mask bits zero */
+ env->cc_op = 0;
+ } else if (s390_vec_equal(&tmp, v2)) {
+ /* Selected bits all ones */
+ env->cc_op = 3;
+ } else {
+ /* Selected bits a mix of zeros and ones */
+ env->cc_op = 1;
+ }
+}
--
2.20.1
- [qemu-s390x] [PULL 35/54] s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE, (continued)
- [qemu-s390x] [PULL 35/54] s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 36/54] s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 37/54] s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL *, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 38/54] s390x/tcg: Implement VECTOR SUBTRACT, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 39/54] s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 40/54] s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW INDICATION, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 42/54] s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 41/54] s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 44/54] s390x/tcg: Implement VECTOR SUM ACROSS WORD, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 43/54] s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 45/54] s390x/tcg: Implement VECTOR TEST UNDER MASK,
Cornelia Huck <=
- [qemu-s390x] [PULL 47/54] s390x/cpumodel: ignore csske for expansion, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 46/54] linux headers: update against Linux 5.2-rc1, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 48/54] s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 49/54] s390x/cpumodel: msa9 facility, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 50/54] s390x/cpumodel: vector enhancements, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 51/54] s390x/cpumodel: enhanced sort facility, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 52/54] s390x/cpumodel: add Deflate-conversion facility, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 53/54] s390x/cpumodel: add gen15 defintions, Cornelia Huck, 2019/05/20
- [qemu-s390x] [PULL 54/54] s390x/cpumodel: wire up 8561 and 8562 as gen15 machines, Cornelia Huck, 2019/05/20
- Re: [qemu-s390x] [PULL 00/54] s390x update, Peter Maydell, 2019/05/20