Re: [PATCH v4 30/37] target/riscv: Use aesdec_ISB_ISR_AK

[Philippe Mathieu-Daudé]

On 3/7/23 12:05, Richard Henderson wrote:
> This implements the AES64DS instruction.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/riscv/crypto_helper.c | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c
> index b072fed3e2..e61f7fe1e5 100644
> --- a/target/riscv/crypto_helper.c
> +++ b/target/riscv/crypto_helper.c
> @@ -213,7 +213,12 @@ target_ulong HELPER(aes64es)(target_ulong rs1, 
> target_ulong rs2)
>   
>   target_ulong HELPER(aes64ds)(target_ulong rs1, target_ulong rs2)
>   {
> -    return aes64_operation(rs1, rs2, false, false);

Matter of taste probably, replacing the code of aes64_operation()
which is re-implemented by g_assert_not_reached() would help
reviewing.

I understand it is too late for a respin.

> +    AESState t;
> +
> +    t.d[HOST_BIG_ENDIAN] = rs1;
> +    t.d[!HOST_BIG_ENDIAN] = rs2;
> +    aesdec_ISB_ISR_AK(&t, &t, &aes_zero, false);
> +    return t.d[HOST_BIG_ENDIAN];
>   }

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>