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[PATCH v6 06/12] target/riscv: Remove unused paramters in pmp_hart_has_p
From: |
Weiwei Li |
Subject: |
[PATCH v6 06/12] target/riscv: Remove unused paramters in pmp_hart_has_privs_default() |
Date: |
Wed, 17 May 2023 17:15:13 +0800 |
The addr and size parameters in pmp_hart_has_privs_default() are unused.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/pmp.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 10a4c7c8f4..666fbb74b9 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -236,8 +236,7 @@ static int pmp_is_in_range(CPURISCVState *env, int
pmp_index,
/*
* Check if the address has required RWX privs when no PMP entry is matched.
*/
-static bool pmp_hart_has_privs_default(CPURISCVState *env, target_ulong addr,
- target_ulong size, pmp_priv_t privs,
+static bool pmp_hart_has_privs_default(CPURISCVState *env, pmp_priv_t privs,
pmp_priv_t *allowed_privs,
target_ulong mode)
{
@@ -309,8 +308,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
/* Short cut if no rules */
if (0 == pmp_get_num_rules(env)) {
- return pmp_hart_has_privs_default(env, addr, size, privs,
- allowed_privs, mode);
+ return pmp_hart_has_privs_default(env, privs, allowed_privs, mode);
}
if (size == 0) {
@@ -454,8 +452,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
/* No rule matched */
if (!ret) {
- ret = pmp_hart_has_privs_default(env, addr, size, privs,
- allowed_privs, mode);
+ ret = pmp_hart_has_privs_default(env, privs, allowed_privs, mode);
}
return ret;
--
2.25.1
- [PATCH v6 00/12] target/riscv: Fix PMP related problem, Weiwei Li, 2023/05/17
- [PATCH v6 04/12] target/riscv: Change the return type of pmp_hart_has_privs() to bool, Weiwei Li, 2023/05/17
- [PATCH v6 06/12] target/riscv: Remove unused paramters in pmp_hart_has_privs_default(),
Weiwei Li <=
- [PATCH v6 07/12] target/riscv: Flush TLB when MMWP or MML bits are changed, Weiwei Li, 2023/05/17
- [PATCH v6 01/12] target/riscv: Update pmp_get_tlb_size(), Weiwei Li, 2023/05/17
- [PATCH v6 03/12] target/riscv: Make the short cut really work in pmp_hart_has_privs, Weiwei Li, 2023/05/17
- [PATCH v6 05/12] target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled, Weiwei Li, 2023/05/17
- [PATCH v6 02/12] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp, Weiwei Li, 2023/05/17
- [PATCH v6 08/12] target/riscv: Update the next rule addr in pmpaddr_csr_write(), Weiwei Li, 2023/05/17
- [PATCH v6 09/12] target/riscv: Flush TLB when pmpaddr is updated, Weiwei Li, 2023/05/17
- [PATCH v6 10/12] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes, Weiwei Li, 2023/05/17
- [PATCH v6 12/12] target/riscv: Deny access if access is partially inside the PMP entry, Weiwei Li, 2023/05/17
- [PATCH v6 11/12] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write, Weiwei Li, 2023/05/17