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qemu-riscv (thread)
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Last Modified: Mon Oct 31 2022 22:57:50 -0400
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[PATCH v2 0/3] Implement the watchdog timer of HiFive 1 rev b.
,
Tommy Wu
,
2022/10/31
[PATCH v2 1/3] hw/misc: sifive_e_aon: Support the watchdog timer of HiFive 1 rev b.
,
Tommy Wu
,
2022/10/31
[PATCH v2 2/3] hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.
,
Tommy Wu
,
2022/10/31
[PATCH v2 3/3] tests/qtest: sifive-e-aon-watchdog-test.c : Add QTest of watchdog of sifive_e
,
Tommy Wu
,
2022/10/31
[PATCH 0/5] Nested virtualization fixes for QEMU
,
Anup Patel
,
2022/10/27
[PATCH 1/5] target/riscv: Typo fix in sstc() predicate
,
Anup Patel
,
2022/10/27
Re: [PATCH 1/5] target/riscv: Typo fix in sstc() predicate
,
Alistair Francis
,
2022/10/30
[PATCH 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
,
Anup Patel
,
2022/10/27
Re: [PATCH 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
,
Alistair Francis
,
2022/10/30
Re: [PATCH 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
,
Anup Patel
,
2022/10/30
[PATCH 5/5] target/riscv: Ensure opcode is saved for all relevant instructions
,
Anup Patel
,
2022/10/27
[PATCH 2/5] target/riscv: Update VS timer whenever htimedelta changes
,
Anup Patel
,
2022/10/27
Re: [PATCH 2/5] target/riscv: Update VS timer whenever htimedelta changes
,
Alistair Francis
,
2022/10/30
[PATCH 3/5] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP
,
Anup Patel
,
2022/10/27
Re: [PATCH 3/5] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP
,
Alistair Francis
,
2022/10/30
[PATCH v1 0/3] target/riscv: Apply KVM policy to ISA extensions
,
Mayuresh Chitale
,
2022/10/27
[PATCH v1 3/3] target/riscv: kvm: Support selecting VCPU extensions
,
Mayuresh Chitale
,
2022/10/27
[PATCH v1 1/3] update-linux-headers: Version 6.1-rc2
,
Mayuresh Chitale
,
2022/10/27
[PATCH v1 2/3] target/riscv: Extend isa_ext_data for single letter extensions
,
Mayuresh Chitale
,
2022/10/27
Re: [PATCH v1 2/3] target/riscv: Extend isa_ext_data for single letter extensions
,
Alistair Francis
,
2022/10/27
Re: [PATCH v1 0/3] target/riscv: Apply KVM policy to ISA extensions
,
Andrew Jones
,
2022/10/27
[PATCH v1 0/2] hw/riscv/opentitan: bump opentitan version
,
Wilfred Mallawa
,
2022/10/25
[PATCH v1 1/2] hw/riscv/opentitan: bump opentitan
,
Wilfred Mallawa
,
2022/10/25
[PATCH v1 2/2] hw/riscv/opentitan: add aon_timer base unimpl
,
Wilfred Mallawa
,
2022/10/25
Re: [PATCH v1 0/2] hw/riscv/opentitan: bump opentitan version
,
Alistair Francis
,
2022/10/25
Re: [RFC 7/8] target/riscv: expose properties for Zc* extension
,
Alistair Francis
,
2022/10/24
Re: [RFC 6/8] target/riscv: delete redundant check for zcd instructions in decode_opc
,
Alistair Francis
,
2022/10/24
Re: [RFC 6/8] target/riscv: delete redundant check for zcd instructions in decode_opc
,
weiwei
,
2022/10/25
Re: [RFC 1/8] target/riscv: add cfg properties for Zc* extension
,
Alistair Francis
,
2022/10/24
[PATCH v0 0/2] hw/riscv/opentitan: bump opentitan version
,
Wilfred Mallawa
,
2022/10/24
[PATCH v0 1/2] hw/riscv/opentitan: bump opentitan
,
Wilfred Mallawa
,
2022/10/24
Re: [PATCH v0 1/2] hw/riscv/opentitan: bump opentitan
,
Bin Meng
,
2022/10/24
Re: [PATCH v0 1/2] hw/riscv/opentitan: bump opentitan
,
Alistair Francis
,
2022/10/25
[PATCH v0 2/2] hw/riscv/opentitan: add aon_timer base unimpl
,
Wilfred Mallawa
,
2022/10/24
Re: [PATCH v0 2/2] hw/riscv/opentitan: add aon_timer base unimpl
,
Bin Meng
,
2022/10/24
Re: [PATCH v0 2/2] hw/riscv/opentitan: add aon_timer base unimpl
,
Alistair Francis
,
2022/10/25
[PATCH v4 05/11] riscv: re-randomize rng-seed on reboot
,
Jason A. Donenfeld
,
2022/10/24
Re: [PATCH v4 05/11] riscv: re-randomize rng-seed on reboot
,
Alistair Francis
,
2022/10/24
[PATCH] treewide: Remove the unnecessary space before semicolon
,
Bin Meng
,
2022/10/24
Re: [PATCH] treewide: Remove the unnecessary space before semicolon
,
Michael S. Tsirkin
,
2022/10/24
Re: [PATCH] treewide: Remove the unnecessary space before semicolon
,
Pavel Pisa
,
2022/10/24
Re: [PATCH] treewide: Remove the unnecessary space before semicolon
,
Peter Maydell
,
2022/10/24
Re: [PATCH] treewide: Remove the unnecessary space before semicolon
,
Laurent Vivier
,
2022/10/24
Re: [PATCH] treewide: Remove the unnecessary space before semicolon
,
Christian Schoenebeck
,
2022/10/24
[PATCH] tcg/riscv: Fix base register for user-only qemu_ld/st
,
Richard Henderson
,
2022/10/23
Re: [PATCH] tcg/riscv: Fix base register for user-only qemu_ld/st
,
LIU Zhiwei
,
2022/10/25
Re: [PATCH] tcg/riscv: Fix base register for user-only qemu_ld/st
,
Alistair Francis
,
2022/10/25
Re: [PATCH] tcg/riscv: Fix base register for user-only qemu_ld/st
,
Alistair Francis
,
2022/10/25
[PATCH 1/1] tcg/riscv: Fix base regsiter for qemu_ld/st
,
LIU Zhiwei
,
2022/10/23
Re: [PATCH 1/1] tcg/riscv: Fix base regsiter for qemu_ld/st
,
Richard Henderson
,
2022/10/23
[PATCH] tcg/riscv: Fix range matched by TCG_CT_CONST_M12
,
Richard Henderson
,
2022/10/22
Re: [PATCH] tcg/riscv: Fix range matched by TCG_CT_CONST_M12
,
LIU Zhiwei
,
2022/10/23
Re: [PATCH] tcg/riscv: Fix range matched by TCG_CT_CONST_M12
,
Alistair Francis
,
2022/10/24
Re: [PATCH] tcg/riscv: Fix range matched by TCG_CT_CONST_M12
,
Alistair Francis
,
2022/10/24
add qemu_fdt_setprop_strings
,
Ben Dooks
,
2022/10/21
[PATCH v5 4/6] hw/core: use qemu_fdt_setprop_strings()
,
Ben Dooks
,
2022/10/21
[PATCH v5 1/6] device_tree: add qemu_fdt_setprop_strings() helper
,
Ben Dooks
,
2022/10/21
Re: [PATCH v5 1/6] device_tree: add qemu_fdt_setprop_strings() helper
,
Andrew Jones
,
2022/10/21
[PATCH v5 5/6] hw/mips: use qemu_fdt_setprop_strings()
,
Ben Dooks
,
2022/10/21
Re: [PATCH v5 5/6] hw/mips: use qemu_fdt_setprop_strings()
,
Philippe Mathieu-Daudé
,
2022/10/21
[PATCH v5 2/6] hw/core: don't check return on qemu_fdt_setprop_string_array()
,
Ben Dooks
,
2022/10/21
[PATCH v5 6/6] hw/arm: change to use qemu_fdt_setprop_strings()
,
Ben Dooks
,
2022/10/21
[PATCH v5 3/6] hw/riscv: use qemu_fdt_setprop_strings() for string arrays
,
Ben Dooks
,
2022/10/21
Re: add qemu_fdt_setprop_strings
,
Andrew Jones
,
2022/10/21
Re: add qemu_fdt_setprop_strings
,
Philippe Mathieu-Daudé
,
2022/10/21
Re: add qemu_fdt_setprop_strings
,
Ben Dooks
,
2022/10/24
[RFC PATCH 0/3] Fix some TCG RISC-V backend bugs
,
LIU Zhiwei
,
2022/10/20
[RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
Richard Henderson
,
2022/10/20
Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
Richard Henderson
,
2022/10/20
Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
Philippe Mathieu-Daudé
,
2022/10/20
Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st
,
LIU Zhiwei
,
2022/10/20
[RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
,
Richard Henderson
,
2022/10/20
Re: [RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
,
Richard Henderson
,
2022/10/21
[RFC PATCH 3/3] tcg/riscv: Remove a wrong optimization for addsub2
,
LIU Zhiwei
,
2022/10/20
Re: [RFC PATCH 3/3] tcg/riscv: Remove a wrong optimization for addsub2
,
Richard Henderson
,
2022/10/20
Re: [RFC PATCH 3/3] tcg/riscv: Remove a wrong optimization for addsub2
,
LIU Zhiwei
,
2022/10/20
Re: [PATCH] target/riscv/pmp: fix non-translated page size address checks w/ MPU
,
Leon Schuermann
,
2022/10/19
Re: [PATCH] target/riscv/pmp: fix non-translated page size address checks w/ MPU
,
Alistair Francis
,
2022/10/24
Re: [PATCH v4 2/2] target/riscv: Enable Zicbo[m,z,p] instructions
,
Atish Patra
,
2022/10/17
Question about TCG backend correctness
,
LIU Zhiwei
,
2022/10/17
Re: Question about TCG backend correctness
,
Alex Bennée
,
2022/10/17
Re: Question about TCG backend correctness
,
LIU Zhiwei
,
2022/10/17
Re: Question about TCG backend correctness
,
Richard Henderson
,
2022/10/18
Re: Question about TCG backend correctness
,
Alex Bennée
,
2022/10/18
Re: Question about TCG backend correctness
,
Richard Henderson
,
2022/10/18
Re: Question about TCG backend correctness
,
LIU Zhiwei
,
2022/10/19
Re: Question about TCG backend correctness
,
Alex Bennée
,
2022/10/19
[PATCH v3 0/2] implement `FIELDx_1CLEAR() macro
,
Wilfred Mallawa
,
2022/10/17
[PATCH v3 1/2] hw/registerfields: add `FIELDx_1CLEAR()` macro
,
Wilfred Mallawa
,
2022/10/17
Re: [PATCH v3 1/2] hw/registerfields: add `FIELDx_1CLEAR()` macro
,
Alistair Francis
,
2022/10/23
[PATCH v3 2/2] hw/ssi/ibex_spi: implement `FIELD32_1CLEAR` macro
,
Wilfred Mallawa
,
2022/10/17
Re: [PATCH v3 2/2] hw/ssi/ibex_spi: implement `FIELD32_1CLEAR` macro
,
Alistair Francis
,
2022/10/23
Re: [PATCH v3 0/2] implement `FIELDx_1CLEAR() macro
,
Alistair Francis
,
2022/10/24
[PATCH v11 0/5] RISC-V Smstateen support
,
Mayuresh Chitale
,
2022/10/16
[PATCH v11 2/5] target/riscv: smstateen check for h/s/envcfg
,
Mayuresh Chitale
,
2022/10/16
[PATCH v11 1/5] target/riscv: Add smstateen support
,
Mayuresh Chitale
,
2022/10/16
[PATCH v11 3/5] target/riscv: generate virtual instruction exception
,
Mayuresh Chitale
,
2022/10/16
Re: [PATCH v11 3/5] target/riscv: generate virtual instruction exception
,
weiwei
,
2022/10/16
[PATCH v11 4/5] target/riscv: smstateen check for fcsr
,
Mayuresh Chitale
,
2022/10/16
[PATCH v11 5/5] target/riscv: smstateen knobs
,
Mayuresh Chitale
,
2022/10/16
[PATCH v3 5/8] riscv: re-randomize rng-seed on reboot
,
Jason A. Donenfeld
,
2022/10/13
[PATCH v1 0/4] Support native debug icount trigger
,
LIU Zhiwei
,
2022/10/13
[PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled
,
LIU Zhiwei
,
2022/10/13
[PATCH v1 2/4] target/riscv: Add itrigger support when icount is enabled
,
LIU Zhiwei
,
2022/10/13
[PATCH v1 3/4] target/riscv: Enable native debug itrigger
,
LIU Zhiwei
,
2022/10/13
[PATCH v1 4/4] target/riscv: Add itrigger_enabled field to CPURISCVState
,
LIU Zhiwei
,
2022/10/13
Re: (subset) [PATCH v4 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings
,
Palmer Dabbelt
,
2022/10/13
[PATCH] target/riscv: Fix PMP propagation for tlb
,
LIU Zhiwei
,
2022/10/12
Re: [PATCH] target/riscv: Fix PMP propagation for tlb
,
LIU Zhiwei
,
2022/10/20
Re: [PATCH] target/riscv: Fix PMP propagation for tlb
,
Alistair Francis
,
2022/10/23
Re: [PATCH] target/riscv: Fix PMP propagation for tlb
,
Alistair Francis
,
2022/10/23
[PATCH] target/riscv: pmp: Fixup TLB size calculation
,
Alistair Francis
,
2022/10/11
Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
,
LIU Zhiwei
,
2022/10/11
Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
,
Alistair Francis
,
2022/10/11
Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
,
LIU Zhiwei
,
2022/10/12
Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
,
Richard Henderson
,
2022/10/13
Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
,
Alistair Francis
,
2022/10/14
Re: [PATCH v5 0/2] hw/ssi/ibex_spi: bug fixes
,
Alistair Francis
,
2022/10/11
[PATCH v2 3/8] riscv: re-randomize rng-seed on reboot
,
Jason A. Donenfeld
,
2022/10/11
Re: [PATCH v2 3/8] riscv: re-randomize rng-seed on reboot
,
Alistair Francis
,
2022/10/12
Re: [PATCH v3] disas/riscv.c: rvv: Add disas support for vector instructions
,
Alistair Francis
,
2022/10/10
Re: [PATCH v3] disas/riscv.c: rvv: Add disas support for vector instructions
,
Alistair Francis
,
2022/10/10
Re: [PATCH 3/6] riscv: re-randomize rng-seed on reboot
,
Alistair Francis
,
2022/10/09
Re: [PATCH v1 2/2] riscv/opentitan: connect lifecycle controller
,
Alistair Francis
,
2022/10/09
Re: [PATCH v1 1/2] hw/misc: add ibex lifecycle controller
,
Alistair Francis
,
2022/10/09
Re: [PATCH 2/3] hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.
,
Alistair Francis
,
2022/10/09
Re: [PATCH 2/3] hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.
,
Tommy Wu
,
2022/10/31
Re: [PATCH 1/3] hw/misc: sifive_e_aon: Support the watchdog timer of HiFive 1 rev b.
,
Alistair Francis
,
2022/10/09
Re: [PATCH 1/3] hw/misc: sifive_e_aon: Support the watchdog timer of HiFive 1 rev b.
,
Tommy Wu
,
2022/10/31
[PATCH] hw/riscv: Update comment for qtest check in riscv_find_firmware()
,
Bin Meng
,
2022/10/09
Re: [PATCH] hw/riscv: Update comment for qtest check in riscv_find_firmware()
,
Alistair Francis
,
2022/10/09
Re: [PATCH] hw/riscv: Update comment for qtest check in riscv_find_firmware()
,
Alistair Francis
,
2022/10/09
[PULL 00/10] Dump patches
,
marcandre . lureau
,
2022/10/06
[PULL 01/10] dump: Replace opaque DumpState pointer with a typed one
,
marcandre . lureau
,
2022/10/06
[PULL 03/10] dump: Refactor dump_iterate and introduce dump_filter_memblock_*()
,
marcandre . lureau
,
2022/10/06
[PULL 02/10] dump: Rename write_elf_loads to write_elf_phdr_loads
,
marcandre . lureau
,
2022/10/06
[PULL 04/10] dump: Rework get_start_block
,
marcandre . lureau
,
2022/10/06
[PULL 05/10] dump: Rework filter area variables
,
marcandre . lureau
,
2022/10/06
[PULL 07/10] dump: Split elf header functions into prepare and write
,
marcandre . lureau
,
2022/10/06
[PULL 06/10] dump: Rework dump_calculate_size function
,
marcandre . lureau
,
2022/10/06
[PULL 08/10] dump: Rename write_elf*_phdr_note to prepare_elf*_phdr_note
,
marcandre . lureau
,
2022/10/06
[PULL 09/10] dump: simplify a bit kdump get_next_page()
,
marcandre . lureau
,
2022/10/06
[PULL 10/10] dump: fix kdump to work over non-aligned blocks
,
marcandre . lureau
,
2022/10/06
Re: [PULL 00/10] Dump patches
,
Stefan Hajnoczi
,
2022/10/11
[PATCH v4] RISC-V: Add Zawrs ISA extension support
,
Christoph Muellner
,
2022/10/05
Re: [PATCH v4] RISC-V: Add Zawrs ISA extension support
,
Alistair Francis
,
2022/10/26
Re: [PATCH v4] RISC-V: Add Zawrs ISA extension support
,
Alistair Francis
,
2022/10/26
[PULL 16/20] hw/core: Add CPUClass.get_pc
,
Richard Henderson
,
2022/10/04
[PATCH v7 16/18] hw/core: Add CPUClass.get_pc
,
Richard Henderson
,
2022/10/04
[PATCH V5 0/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
,
Sunil V L
,
2022/10/04
[PATCH V5 1/3] hw/arm, loongarch: Move load_image_to_fw_cfg() to common location
,
Sunil V L
,
2022/10/04
[PATCH V5 2/3] hw/riscv: virt: Move create_fw_cfg() prior to loading kernel
,
Sunil V L
,
2022/10/04
[PATCH V5 3/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
,
Sunil V L
,
2022/10/04
Re: [PATCH V5 3/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
,
Alistair Francis
,
2022/10/09
Re: [PATCH V5 3/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
,
Bernhard Beschow
,
2022/10/11
Re: [PATCH V5 0/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
,
Alistair Francis
,
2022/10/11
Re: Question about RISC-V brom register a1 set value
,
Philippe Mathieu-Daudé
,
2022/10/03
回复：Question about RISC-V brom register a1 set value
,
刘志伟
,
2022/10/05
Re: Question about RISC-V brom register a1 set value
,
Eric Chan
,
2022/10/05
[PATCH v10 0/5] RISC-V Smstateen support
,
Mayuresh Chitale
,
2022/10/03
[PATCH v10 3/5] target/riscv: generate virtual instruction exception
,
Mayuresh Chitale
,
2022/10/03
Re: [PATCH v10 3/5] target/riscv: generate virtual instruction exception
,
weiwei
,
2022/10/10
[PATCH v10 2/5] target/riscv: smstateen check for h/s/envcfg
,
Mayuresh Chitale
,
2022/10/03
[PATCH v10 1/5] target/riscv: Add smstateen support
,
Mayuresh Chitale
,
2022/10/03
[PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
Mayuresh Chitale
,
2022/10/03
Re: [PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
weiwei
,
2022/10/03
Re: [PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
mchitale
,
2022/10/04
Re: [PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
weiwei
,
2022/10/04
Re: [PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
mchitale
,
2022/10/06
Re: [PATCH v10 4/5] target/riscv: smstateen check for fcsr
,
weiwei
,
2022/10/10
[PATCH v10 5/5] target/riscv: smstateen knobs
,
Mayuresh Chitale
,
2022/10/03
Re: [PATCH v6 16/18] hw/core: Add CPUClass.get_pc
,
Mark Cave-Ayland
,
2022/10/03
Re: [PATCH v6 16/18] hw/core: Add CPUClass.get_pc
,
Alex Bennée
,
2022/10/03
[PATCH v3 0/2] Enhance maximum priority support of PLIC
,
Jim Shu
,
2022/10/03
[PATCH v3 1/2] hw/intc: sifive_plic: fix hard-coded max priority level
,
Jim Shu
,
2022/10/03
Re: [PATCH v3 1/2] hw/intc: sifive_plic: fix hard-coded max priority level
,
Alistair Francis
,
2022/10/11
[PATCH v3 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field
,
Jim Shu
,
2022/10/03
Re: [PATCH v3 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field
,
Clément Chigot
,
2022/10/03
Re: [PATCH v3 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field
,
Alistair Francis
,
2022/10/11
Re: [PATCH v3 0/2] Enhance maximum priority support of PLIC
,
Jim Shu
,
2022/10/11
Re: [PATCH v3 0/2] Enhance maximum priority support of PLIC
,
Alistair Francis
,
2022/10/11
Re: [PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field
,
Jim Shu
,
2022/10/03
Re: [PATCH v9 3/4] target/riscv: smstateen check for fcsr
,
mchitale
,
2022/10/01
Re: [PATCH v9 1/4] target/riscv: Add smstateen support
,
mchitale
,
2022/10/01
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