|
| From: | Weiwei Li |
| Subject: | Re: [PATCH qemu v2 04/10] target/riscv: rvv: Add mask agnostic for vector integer shift instructions |
| Date: | Wed, 11 May 2022 10:09:46 +0800 |
| User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 |
在 2022/3/17 下午4:43, ~eopxd 写道:
From: Yueh-Ting (eop) Chen <eop.chen@sifive.com> Signed-off-by: eop Chen <eop.chen@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> --- target/riscv/insn_trans/trans_rvv.c.inc | 1 + target/riscv/vector_helper.c | 7 +++++++ 2 files changed, 8 insertions(+)
Reviewed-by: Weiwei Li<liweiwei@iscas.ac.cn> Regards, Weiwei Li
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index de8dda31fe..ffbbbf9b3a 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -1946,6 +1946,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
\
data = FIELD_DP32(data, VDATA, VM, a->vm); \
data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
data = FIELD_DP32(data, VDATA, VTA, s->vta); \
+ data = FIELD_DP32(data, VDATA, VMA, s->vma); \
tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
vreg_ofs(s, a->rs1), \
vreg_ofs(s, a->rs2), cpu_env, \
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 98c9f21182..0583602528 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -1300,10 +1300,13 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,
\
uint32_t esz = sizeof(TS1); \
uint32_t total_elems = vext_get_total_elems(env, desc, esz); \
uint32_t vta = vext_vta(desc); \
+ uint32_t vma = vext_vma(desc); \
uint32_t i; \
\
for (i = env->vstart; i < vl; i++) { \
if (!vm && !vext_elem_mask(v0, i)) { \
+ /* set masked-off elements to 1s */ \
+ vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \
continue; \
} \
TS1 s1 = *((TS1 *)vs1 + HS1(i)); \
@@ -1341,10 +1344,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1,
\
uint32_t total_elems = \
vext_get_total_elems(env, desc, esz); \
uint32_t vta = vext_vta(desc); \
+ uint32_t vma = vext_vma(desc); \
uint32_t i; \
\
for (i = env->vstart; i < vl; i++) { \
if (!vm && !vext_elem_mask(v0, i)) { \
+ /* set masked-off elements to 1s */ \
+ vext_set_elems_1s(vd, vma, i * esz, \
+ (i + 1) * esz); \
continue; \
} \
TS2 s2 = *((TS2 *)vs2 + HS2(i)); \
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