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Re: [PATCH] target/riscv/pmp: fix no pmp illegal intrs
From: |
Alistair Francis |
Subject: |
Re: [PATCH] target/riscv/pmp: fix no pmp illegal intrs |
Date: |
Thu, 23 Dec 2021 08:15:33 +1000 |
On Tue, Dec 21, 2021 at 6:08 PM Nikita Shubin <nikita.shubin@maquefel.me> wrote:
>
> From: Nikita Shubin <n.shubin@yadro.com>
>
> As per the privilege specification, any access from S/U mode should fail
> if no pmp region is configured and pmp is present, othwerwise access
> should succeed.
>
> Fixes: d102f19a208 (target/riscv/pmp: Raise exception if no PMP entry is
> configured)
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/585
> Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/op_helper.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index ee7c24efe7..58d992e98a 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -146,7 +146,8 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong
> cpu_pc_deb)
> uint64_t mstatus = env->mstatus;
> target_ulong prev_priv = get_field(mstatus, MSTATUS_MPP);
>
> - if (!pmp_get_num_rules(env) && (prev_priv != PRV_M)) {
> + if (riscv_feature(env, RISCV_FEATURE_PMP) &&
> + !pmp_get_num_rules(env) && (prev_priv != PRV_M)) {
> riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
> }
>
> --
> 2.31.1
>
>