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Re: [PATCH v5 16/23] hw/riscv: virt: Use AIA INTC compatible string when
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From: |
Kip Walker |
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Subject: |
Re: [PATCH v5 16/23] hw/riscv: virt: Use AIA INTC compatible string when available |
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Date: |
Tue, 14 Dec 2021 17:08:09 -0800 |
On Fri, Dec 10, 2021 at 8:35 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> We should use the AIA INTC compatible string in the CPU INTC
> DT nodes when the CPUs support AIA feature. This will allow
> Linux INTC driver to use AIA local interrupt CSRs.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/riscv/virt.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 3af074148e..936156554c 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s,
> int socket,
> qemu_fdt_add_subnode(mc->fdt, intc_name);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
> intc_phandles[cpu]);
> - qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> - "riscv,cpu-intc");
> + if (riscv_feature(&s->soc[socket].harts[cpu].env,
> + RISCV_FEATURE_AIA)) {
> + static const char * const compat[2] = {
> + "riscv,cpu-intc-aia", "riscv,cpu-intc"
> + };
> + qemu_fdt_setprop_string_array(mc->fdt, name, "compatible",
> + (char **)&compat, ARRAY_SIZE(compat));
I think this should be intc_name rather than name.
Kip
> + } else {
> + qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
> + "riscv,cpu-intc");
> + }
> qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL,
> 0);
> qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
>
> --
> 2.25.1
>
>
- [PATCH v5 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32, (continued)
- [PATCH v5 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32, Anup Patel, 2021/12/10
- [PATCH v5 11/23] target/riscv: Implement AIA hvictl and hviprioX CSRs, Anup Patel, 2021/12/10
- [PATCH v5 12/23] target/riscv: Implement AIA interrupt filtering CSRs, Anup Patel, 2021/12/10
- [PATCH v5 13/23] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs, Anup Patel, 2021/12/10
- [PATCH v5 14/23] target/riscv: Implement AIA xiselect and xireg CSRs, Anup Patel, 2021/12/10
- [PATCH v5 16/23] hw/riscv: virt: Use AIA INTC compatible string when available, Anup Patel, 2021/12/10
- Re: [PATCH v5 16/23] hw/riscv: virt: Use AIA INTC compatible string when available,
Kip Walker <=
- [PATCH v5 15/23] target/riscv: Implement AIA IMSIC interface CSRs, Anup Patel, 2021/12/10
- [PATCH v5 17/23] target/riscv: Allow users to force enable AIA CSRs in HART, Anup Patel, 2021/12/10
- [PATCH v5 18/23] hw/intc: Add RISC-V AIA APLIC device emulation, Anup Patel, 2021/12/10
- [PATCH v5 19/23] hw/riscv: virt: Add optional AIA APLIC support to virt machine, Anup Patel, 2021/12/10
- [PATCH v5 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation, Anup Patel, 2021/12/10
- [PATCH v5 21/23] hw/riscv: virt: Add optional AIA IMSIC support to virt machine, Anup Patel, 2021/12/10
- [PATCH v5 22/23] docs/system: riscv: Document AIA options for virt machine, Anup Patel, 2021/12/10
- [PATCH v5 23/23] hw/riscv: virt: Increase maximum number of allowed CPUs, Anup Patel, 2021/12/10