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[PATCH v1 0/2] RISC-V: Populate mtval and stval
From: |
Alistair Francis |
Subject: |
[PATCH v1 0/2] RISC-V: Populate mtval and stval |
Date: |
Fri, 3 Sep 2021 09:23:22 +1000 |
From: Alistair Francis <alistair.francis@wdc.com>
Populate mtval and stval when taking an illegal instruction exception if
the features are set for the CPU.
Alistair Francis (2):
target/riscv: Implement the stval/mtval illegal instruction
target/riscv: Set mtval and stval support
target/riscv/cpu.h | 6 +++++-
target/riscv/cpu.c | 6 +++++-
target/riscv/cpu_helper.c | 9 +++++++++
target/riscv/translate.c | 33 +++++++++++++++++++--------------
4 files changed, 38 insertions(+), 16 deletions(-)
--
2.31.1
- [PATCH v1 0/2] RISC-V: Populate mtval and stval,
Alistair Francis <=