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Re: [RESEND PATCH 9/9] hw/riscv: microchip_pfsoc: Hook the I2C1 controll
From: |
Alistair Francis |
Subject: |
Re: [RESEND PATCH 9/9] hw/riscv: microchip_pfsoc: Hook the I2C1 controller |
Date: |
Tue, 27 Oct 2020 10:19:55 -0700 |
On Tue, Oct 27, 2020 at 7:55 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> The latest SD card image [1] released by Microchip ships a Linux
> kernel with built-in PolarFire SoC I2C driver support. The device
> tree file includes the description for the I2C1 node hence kernel
> tries to probe the I2C1 device during boot.
>
> It is enough to create an unimplemented device for I2C1 to allow
> the kernel to continue booting to the shell.
>
> [1]
> ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
>
> ---
>
> hw/riscv/microchip_pfsoc.c | 6 ++++++
> include/hw/riscv/microchip_pfsoc.h | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
> index c595c9c967..4e878c2836 100644
> --- a/hw/riscv/microchip_pfsoc.c
> +++ b/hw/riscv/microchip_pfsoc.c
> @@ -94,6 +94,7 @@ static const struct MemmapEntry {
> [MICROCHIP_PFSOC_MMUART2] = { 0x20102000, 0x1000 },
> [MICROCHIP_PFSOC_MMUART3] = { 0x20104000, 0x1000 },
> [MICROCHIP_PFSOC_MMUART4] = { 0x20106000, 0x1000 },
> + [MICROCHIP_PFSOC_I2C1] = { 0x2010b000, 0x1000 },
> [MICROCHIP_PFSOC_GEM0] = { 0x20110000, 0x2000 },
> [MICROCHIP_PFSOC_GEM1] = { 0x20112000, 0x2000 },
> [MICROCHIP_PFSOC_GPIO0] = { 0x20120000, 0x1000 },
> @@ -324,6 +325,11 @@ static void microchip_pfsoc_soc_realize(DeviceState
> *dev, Error **errp)
> qdev_get_gpio_in(DEVICE(s->plic), MICROCHIP_PFSOC_MMUART4_IRQ),
> serial_hd(4));
>
> + /* I2C1 */
> + create_unimplemented_device("microchip.pfsoc.i2c1",
> + memmap[MICROCHIP_PFSOC_I2C1].base,
> + memmap[MICROCHIP_PFSOC_I2C1].size);
> +
> /* GEMs */
>
> nd = &nd_table[0];
> diff --git a/include/hw/riscv/microchip_pfsoc.h
> b/include/hw/riscv/microchip_pfsoc.h
> index dc05688d94..74ae789c03 100644
> --- a/include/hw/riscv/microchip_pfsoc.h
> +++ b/include/hw/riscv/microchip_pfsoc.h
> @@ -96,6 +96,7 @@ enum {
> MICROCHIP_PFSOC_MMUART2,
> MICROCHIP_PFSOC_MMUART3,
> MICROCHIP_PFSOC_MMUART4,
> + MICROCHIP_PFSOC_I2C1,
> MICROCHIP_PFSOC_GEM0,
> MICROCHIP_PFSOC_GEM1,
> MICROCHIP_PFSOC_GPIO0,
> --
> 2.25.1
>
>
- Re: [RESEND PATCH 5/9] hw/misc: Add Microchip PolarFire SoC SYSREG module support, (continued)