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[PATCH v1 15/16] target/riscv: Convert the get/set_field() to support 64
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From: |
Alistair Francis |
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Subject: |
[PATCH v1 15/16] target/riscv: Convert the get/set_field() to support 64-bit values |
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Date: |
Fri, 23 Oct 2020 08:33:54 -0700 |
Allow the get_field() and set_field() macros to work on 64-bit values
even on 32-bit RISC-V.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu_bits.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index d9ad694b3f..db46739b1c 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -4,10 +4,10 @@
#define TARGET_RISCV_CPU_BITS_H
#define get_field(reg, mask) (((reg) & \
- (target_ulong)(mask)) / ((mask) & ~((mask) << 1)))
-#define set_field(reg, mask, val) (((reg) & ~(target_ulong)(mask)) | \
- (((target_ulong)(val) * ((mask) & ~((mask) << 1))) & \
- (target_ulong)(mask)))
+ (uint64_t)(mask)) / ((mask) & ~((mask) << 1)))
+#define set_field(reg, mask, val) (((reg) & ~(uint64_t)(mask)) | \
+ (((uint64_t)(val) * ((mask) & ~((mask) << 1))) & \
+ (uint64_t)(mask)))
/* Floating point round mode */
#define FSR_RD_SHIFT 5
--
2.28.0
- Re: [PATCH v1 08/16] target/riscv: fpu_helper: Match function defs in HELPER macros, (continued)
- [PATCH v1 09/16] target/riscv: Add a riscv_cpu_is_32bit() helper function, Alistair Francis, 2020/10/23
- [PATCH v1 10/16] target/riscv: Specify the XLEN for CPUs, Alistair Francis, 2020/10/23
- [PATCH v1 11/16] target/riscv: cpu: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 12/16] target/riscv: cpu_helper: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 15/16] target/riscv: Convert the get/set_field() to support 64-bit values,
Alistair Francis <=
- [PATCH v1 13/16] target/riscv: csr: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 16/16] target/riscv: Consolidate *statush registers, Alistair Francis, 2020/10/23
- [PATCH v1 14/16] target/riscv: cpu: Set XLEN independently from target, Alistair Francis, 2020/10/23
- Re: [PATCH v1 00/16] RISC-V: Start to remove xlen preprocess, Bin Meng, 2020/10/26