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Re: [PATCH v2 3/4] hw/riscv: Add a riscv_is_32_bit() function
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From: |
Bin Meng |
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Subject: |
Re: [PATCH v2 3/4] hw/riscv: Add a riscv_is_32_bit() function |
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Date: |
Tue, 20 Oct 2020 11:17:50 +0800 |
On Wed, Oct 14, 2020 at 8:28 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> include/hw/riscv/boot.h | 2 ++
> hw/riscv/boot.c | 9 +++++++++
> 2 files changed, 11 insertions(+)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
- [PATCH v2 0/4] Allow loading a no MMU kernel, Alistair Francis, 2020/10/13
- [PATCH v2 2/4] hw/riscv: Return the end address of the loaded firmware, Alistair Francis, 2020/10/13
- [PATCH v2 1/4] hw/riscv: sifive_u: Allow specifying the CPU, Alistair Francis, 2020/10/13
- [PATCH v2 3/4] hw/riscv: Add a riscv_is_32_bit() function, Alistair Francis, 2020/10/13
- [PATCH v2 4/4] hw/riscv: Load the kernel after the firmware, Alistair Francis, 2020/10/13
- Re: [PATCH v2 0/4] Allow loading a no MMU kernel, Alistair Francis, 2020/10/20