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Re: [PATCH] riscv: Separate FPU register size from core register size in
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Subject: |
Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub |
Date: |
Tue, 28 Jan 2020 14:46:34 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [PATCH] riscv: Separate FPU register size from core register size in
gdbstub
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
f8704a8 riscv: Separate FPU register size from core register size in gdbstub
=== OUTPUT BEGIN ===
ERROR: braces {} are necessary for all arms of this statement
#44: FILE: target/riscv/gdbstub.c:306:
+ if (env->misa & RVD)
[...]
total: 1 errors, 0 warnings, 54 lines checked
Commit f8704a85f17a (riscv: Separate FPU register size from core register size
in gdbstub) has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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