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Re: [Qemu-riscv] [Qemu-devel] [PATCH v4 7/7] target/riscv: Use TB_FLAGS_
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From: |
Alistair Francis |
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Subject: |
Re: [Qemu-riscv] [Qemu-devel] [PATCH v4 7/7] target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point |
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Date: |
Fri, 23 Aug 2019 08:43:55 -0700 |
On Fri, Aug 23, 2019 at 8:44 AM Peter Maydell <address@hidden> wrote:
>
> On Fri, 23 Aug 2019 at 16:37, Alistair Francis <address@hidden> wrote:
> >
> > Use the TB_FLAGS_MSTATUS_FS macro when enabling floating point in the tb
> > flags.
> >
> > Signed-off-by: Alistair Francis <address@hidden>
> > ---
> > target/riscv/cpu.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> > index eb7b5b0af3..0347be453b 100644
> > --- a/target/riscv/cpu.h
> > +++ b/target/riscv/cpu.h
> > @@ -301,7 +301,7 @@ static inline void cpu_get_tb_cpu_state(CPURISCVState
> > *env, target_ulong *pc,
> > #else
> > *flags = cpu_mmu_index(env, 0);
> > if (riscv_cpu_fp_enabled(env)) {
> > - *flags |= env->mstatus & MSTATUS_FS;
> > + *flags |= TB_FLAGS_MSTATUS_FS;
> > }
> > #endif
>
> The old code was setting the bit in flags only if
> it was also set in env->mstatus; the new code sets
> the bit unconditionally -- deliberate change ?
Yes it is deliberate as the riscv_cpu_fp_enabled() function already
does the check. The function contains the exact same & operation
inside of it.
Alistair
>
> thanks
> -- PMM
- [Qemu-riscv] [PATCH v4 0/7] RISC-V: Hypervisor prep work part 2, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 1/7] target/riscv: Don't set write permissions on dirty PTEs, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 2/7] riscv: plic: Remove unused interrupt functions, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 3/7] target/riscv: Create function to test if FP is enabled, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 4/7] target/riscv: Update the Hypervisor CSRs to v0.4, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 5/7] target/riscv: Use both register name and ABI name, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 6/7] target/riscv: Fix mstatus dirty mask, Alistair Francis, 2019/08/23
- [Qemu-riscv] [PATCH v4 7/7] target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point, Alistair Francis, 2019/08/23