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From: | Palmer Dabbelt |
Subject: | Re: [Qemu-riscv] [Qemu-devel] [PATCH for 4.1] RISC-V: Ignore the S and U extensions when formatting ISA strings |
Date: | Tue, 13 Aug 2019 15:54:46 -0700 (PDT) |
On Wed, 07 Aug 2019 10:54:52 PDT (-0700), address@hidden wrote:
On Wed, Aug 7, 2019 at 8:00 AM Palmer Dabbelt <address@hidden> wrote:The ISA strings we're providing from QEMU aren't actually legal RISC-V ISA strings, as both the S and U extensions cannot exist as single-letter extensions and must instead be multi-letter strings. We're still using the ISA strings inside QEMU to track the availiables/availiable/available/gextensions, so this patch just strips out the S and U extensions when formatting ISA strings.Atish and I were talking about this and we concluded that S and U aren't extensions, but should be reported in the misa CSR.
Andrew agrees.
This boots Linux on top of 4.1-rc3, which no longer has the U extension in /proc/cpuinfo. Signed-off-by: Palmer Dabbelt <address@hidden> --- This is another late one, but I'd like to target it for 4.1 as we're providing illegal ISA strings and I don't want to bake that into a bunch of other code. --- target/riscv/cpu.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f8d07bd20ad7..4df14433d789 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -501,7 +501,22 @@ char *riscv_isa_string(RISCVCPU *cpu) char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", TARGET_LONG_BITS); for (i = 0; i < sizeof(riscv_exts); i++) { if (cpu->env.misa & RV(riscv_exts[i])) { - *p++ = qemu_tolower(riscv_exts[i]); + char lower = qemu_tolower(riscv_exts[i]); + switch (lower) { + case 's': + case 'u': + /* + * The 's' and 'u' extensions shouldn't be passed in the device + * tree, but we still use them internally to track extension + * sets. Here we just explicitly remove them when formatting + * an ISA string.This should be updated to note mention 's' and 'u' as extensions, but clarify that they are correctly include in the misa CSR.
I'll send a v2 that cleans up the wording on the comment and commit message.
Alistair+ */ + break; + + default: + *p++ = qemu_tolower(riscv_exts[i]); + break; + } } } *p = '\0'; -- 2.21.0
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